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authorEric Anholt <[email protected]>2012-10-15 17:48:07 -0700
committerEric Anholt <[email protected]>2012-10-17 12:23:59 -0700
commitaf911b2819e5175008c67e6939d88ec28cda69d1 (patch)
tree152f85167ad47347e38e17a3643d8d9af745bba2 /src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
parent9499f7984e7393f5acf214f126481695a774e8e7 (diff)
i965/vs: Do the temporary allocation in emit_scratch_write().
Both callers were doing basically the same thing, just written differently. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp11
1 files changed, 1 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index a2381bc30f2..ac3d401ac3f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -346,16 +346,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
}
if (inst->dst.file == GRF && inst->dst.reg == spill_reg_nr) {
- dst_reg spill_reg = inst->dst;
- inst->dst.reg = virtual_grf_alloc(1);
-
- /* We don't want a swizzle when reading from the source; read the
- * whole register and use spill_reg's writemask to select which
- * channels to write.
- */
- src_reg temp = src_reg(inst->dst);
- temp.swizzle = BRW_SWIZZLE_XYZW;
- emit_scratch_write(inst, temp, spill_offset);
+ emit_scratch_write(inst, spill_offset);
}
}