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authorMatt Turner <[email protected]>2015-02-12 01:42:43 +0000
committerMatt Turner <[email protected]>2015-02-19 21:16:44 -0800
commite0137fd6f720e4977466b1760ac02a72c5abceb8 (patch)
tree462f9756fc056ffa4b4e8b56052b2a87ecaa7ae1 /src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
parentdada30462b8469509ef16fbc351764d42320b236 (diff)
i965/vec4: Add and use byte-MOV instruction for unpack 4x8.
Previously we were using a B/UB source in an Align16 instruction, which is illegal. It for some reason works on all platforms, except Broadwell. Cc: "10.5" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811 Reviewed-by: Ian Romanick <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_generator.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_generator.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 3d03b6096e3..67c82850188 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1512,6 +1512,22 @@ vec4_generator::generate_code(const cfg_t *cfg)
generate_unpack_flags(dst);
break;
+ case VEC4_OPCODE_MOV_BYTES: {
+ /* Moves the low byte from each channel, using an Align1 access mode
+ * and a <4,1,0> source region.
+ */
+ assert(src[0].type == BRW_REGISTER_TYPE_UB ||
+ src[0].type == BRW_REGISTER_TYPE_B);
+
+ brw_set_default_access_mode(p, BRW_ALIGN_1);
+ src[0].vstride = BRW_VERTICAL_STRIDE_4;
+ src[0].width = BRW_WIDTH_1;
+ src[0].hstride = BRW_HORIZONTAL_STRIDE_0;
+ brw_MOV(p, dst, src[0]);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
+ break;
+ }
+
case VEC4_OPCODE_PACK_BYTES: {
/* Is effectively:
*