diff options
author | Iago Toral Quiroga <[email protected]> | 2015-09-18 08:15:52 +0200 |
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committer | Iago Toral Quiroga <[email protected]> | 2015-09-21 12:47:03 +0200 |
commit | d48ac93066190077510d635e71631b6574261d08 (patch) | |
tree | 4b5394533c1f9ff14035c243c36adbeda2d4502a /src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | |
parent | b65f91dd3285ca0daee658cdf9ac41caaad2f1fb (diff) |
i965: Maximum allowed size of SEND messages is 15 (4 bits)
Until now we only used MRFs 1..15 for regular SEND messages, so the
message length could not possibly exceed the maximum size. Soon we'll
allow to use MRF registers 1..23 in gen6, so we need to be careful
not to build messages that can go beyond the limit. That could occur,
specifically, when building URB write messages, which we may need to
split in chunks due to their size. Previously we would simply go and
create a new message when we reached MRF 13 (since 13..15 were
reserved for spilling), now we also want to check the size of the
message explicitly.
Besides adding that condition to split URB write messages properly,
this patch also adds asserts in the generator. Notice that
brw_inst_set_mlen already asserts for this, but asserting in the
generators is easy and can make debugging easier in some cases.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_generator.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index 195033358fb..f11d3c3615d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -1134,6 +1134,8 @@ vec4_generator::generate_code(const cfg_t *cfg) brw_set_default_mask_control(p, inst->force_writemask_all); brw_set_default_acc_write_control(p, inst->writes_accumulator); + assert(inst->mlen <= BRW_MAX_MSG_LENGTH); + unsigned pre_emit_nr_insn = p->nr_insn; if (dst.width == BRW_WIDTH_4) { |