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authorKenneth Graunke <[email protected]>2013-07-06 00:36:46 -0700
committerKenneth Graunke <[email protected]>2013-07-09 14:09:34 -0700
commit53631be4ebaa4fb13a7f129727c1cdd32fcc6f3d (patch)
treeddad922e67aee2521ea03acb27bcf38085d836c8 /src/mesa/drivers/dri/i965/brw_vec4.cpp
parent2e26afb37b83effe44b218d5b2a305020b8ad22f (diff)
i965: Move intel_context::gen and gt fields to brw_context.
Most functions no longer use intel_context, so this patch additionally removes the local "intel" variables to avoid compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index c9367063769..535eca48e7d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -215,7 +215,7 @@ vec4_instruction::is_send_from_grf()
bool
vec4_visitor::can_do_source_mods(vec4_instruction *inst)
{
- if (intel->gen == 6 && inst->is_math())
+ if (brw->gen == 6 && inst->is_math())
return false;
if (inst->is_send_from_grf())
@@ -878,7 +878,7 @@ vec4_visitor::opt_register_coalesce()
if (scan_inst->mlen)
break;
- if (intel->gen == 6) {
+ if (brw->gen == 6) {
/* gen6 math instructions must have the destination be
* GRF, so no compute-to-MRF for them.
*/
@@ -1248,7 +1248,7 @@ vec4_vs_visitor::setup_attributes(int payload_reg)
unsigned vue_entries =
MAX2(nr_attributes, prog_data->vue_map.num_slots);
- if (intel->gen == 6)
+ if (brw->gen == 6)
prog_data->urb_entry_size = ALIGN(vue_entries, 8) / 8;
else
prog_data->urb_entry_size = ALIGN(vue_entries, 4) / 4;
@@ -1262,7 +1262,7 @@ vec4_visitor::setup_uniforms(int reg)
/* The pre-gen6 VS requires that some push constants get loaded no
* matter what, or the GPU would hang.
*/
- if (intel->gen < 6 && this->uniforms == 0) {
+ if (brw->gen < 6 && this->uniforms == 0) {
this->uniform_vector_size[this->uniforms] = 1;
for (unsigned int i = 0; i < 4; i++) {
@@ -1305,7 +1305,7 @@ vec4_visitor::setup_payload(void)
src_reg
vec4_visitor::get_timestamp()
{
- assert(intel->gen >= 7);
+ assert(brw->gen >= 7);
src_reg ts = src_reg(brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_TIMESTAMP,