i965: Delete tile resource mode code

Yf/Ys tiling never got used in i965 due to not delivering
the expected performance benefits. So, this patch is deleting
this dead code in favor of adding it later in ISL when we
actually find it useful. ISL can then share this code between
vulkan and GL.

Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>

1 files changed, 0 insertions, 130 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 8a528e088a4..bfa8afaa698 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -40,74 +40,6 @@
 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
 
 static unsigned int
-tr_mode_horizontal_texture_alignment(const struct intel_mipmap_tree *mt)
-{
-   unsigned ret_align, divisor, multiplier_ys;
-
-   /* Values in below tables specifiy the horizontal alignment requirement
-    * in elements for TRMODE_YF surface. An element is defined as a pixel in
-    * uncompressed surface formats, and as a compression block in compressed
-    * surface formats. For MSFMT_DEPTH_STENCIL type multisampled surfaces, an
-    * element is a sample.
-    */
-   const unsigned align_1d_yf[] = {4096, 2048, 1024, 512, 256};
-   const unsigned align_2d_yf[] = {64, 64, 32, 32, 16};
-   const unsigned align_3d_yf[] = {16, 8, 8, 8, 4};
-
-   assert(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE);
-
-   /* Alignment computations below assume a power of 2 cpp. */
-   assert (mt->cpp >= 1 && mt->cpp <= 16 && _mesa_is_pow_two(mt->cpp));
-   /* Compute array index. */
-   const int i = ffs(mt->cpp) - 1;
-
-   switch(mt->target) {
-   case GL_TEXTURE_1D:
-   case GL_TEXTURE_1D_ARRAY:
-      ret_align = align_1d_yf[i];
-      multiplier_ys = 16;
-      break;
-   case GL_TEXTURE_2D:
-   case GL_TEXTURE_RECTANGLE:
-   case GL_TEXTURE_2D_ARRAY:
-   case GL_TEXTURE_CUBE_MAP:
-   case GL_TEXTURE_CUBE_MAP_ARRAY:
-   case GL_TEXTURE_2D_MULTISAMPLE:
-   case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
-      ret_align = align_2d_yf[i];
-      multiplier_ys = 4;
-      break;
-   case GL_TEXTURE_3D:
-      ret_align = align_3d_yf[i];
-      multiplier_ys = 4;
-      break;
-   default:
-      unreachable("not reached");
-   }
-
-   if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS)
-      ret_align *= multiplier_ys;
-
-   assert(_mesa_is_pow_two(mt->num_samples));
-
-   switch (mt->num_samples) {
-   case 2:
-   case 4:
-      divisor = 2;
-      break;
-   case 8:
-   case 16:
-      divisor = 4;
-      break;
-   default:
-      divisor = 1;
-      break;
-   }
-   return ret_align / divisor;
-}
-
-
-static unsigned int
 intel_horizontal_texture_alignment_unit(struct brw_context *brw,
                                         struct intel_mipmap_tree *mt,
                                         uint32_t layout_flags)
@@ -141,63 +73,6 @@ intel_horizontal_texture_alignment_unit(struct brw_context *brw,
 }
 
 static unsigned int
-tr_mode_vertical_texture_alignment(const struct intel_mipmap_tree *mt)
-{
-   unsigned ret_align, divisor, multiplier_ys;
-
-   /* Vertical alignment tables for TRMODE_YF */
-   const unsigned align_2d_yf[] = {64, 32, 32, 16, 16};
-   const unsigned align_3d_yf[] = {16, 16, 16, 8, 8};
-
-   assert(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE);
-
-   /* Alignment computations below assume a power of 2 cpp. */
-   assert (mt->cpp >= 1 && mt->cpp <= 16 && _mesa_is_pow_two(mt->cpp)) ;
-   /* Compute array index. */
-   const int i = ffs(mt->cpp) - 1;
-
-   switch(mt->target) {
-   case GL_TEXTURE_2D:
-   case GL_TEXTURE_RECTANGLE:
-   case GL_TEXTURE_2D_ARRAY:
-   case GL_TEXTURE_CUBE_MAP:
-   case GL_TEXTURE_CUBE_MAP_ARRAY:
-   case GL_TEXTURE_2D_MULTISAMPLE:
-   case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
-      ret_align = align_2d_yf[i];
-      multiplier_ys = 4;
-      break;
-   case GL_TEXTURE_3D:
-      ret_align = align_3d_yf[i];
-      multiplier_ys = 2;
-      break;
-   case GL_TEXTURE_1D:
-   case GL_TEXTURE_1D_ARRAY:
-   default:
-      unreachable("Unexpected miptree target");
-   }
-
-   if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS)
-      ret_align *= multiplier_ys;
-
-   assert(_mesa_is_pow_two(mt->num_samples));
-
-   switch (mt->num_samples) {
-   case 4:
-   case 8:
-      divisor = 2;
-      break;
-   case 16:
-      divisor = 4;
-      break;
-   default:
-      divisor = 1;
-      break;
-   }
-   return ret_align / divisor;
-}
-
-static unsigned int
 intel_vertical_texture_alignment_unit(struct brw_context *brw,
                                       const struct intel_mipmap_tree *mt)
 {
@@ -753,9 +628,6 @@ intel_miptree_set_alignment(struct brw_context *brw,
    } else if (mt->format == MESA_FORMAT_S_UINT8) {
       mt->halign = 8;
       mt->valign = brw->gen >= 7 ? 8 : 4;
-   } else if (brw->gen >= 9 && mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) {
-      mt->halign = tr_mode_horizontal_texture_alignment(mt);
-      mt->valign = tr_mode_vertical_texture_alignment(mt);
    } else {
       mt->halign =
          intel_horizontal_texture_alignment_unit(brw, mt, layout_flags);
@@ -768,8 +640,6 @@ brw_miptree_layout(struct brw_context *brw,
                    struct intel_mipmap_tree *mt,
                    uint32_t layout_flags)
 {
-   mt->tr_mode = INTEL_MIPTREE_TRMODE_NONE;
-
    intel_miptree_set_alignment(brw, mt, layout_flags);
    intel_miptree_set_total_width_height(brw, mt);