diff options
| author | Kenneth Graunke <[email protected]> | 2016-11-22 14:43:57 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2017-01-07 20:42:32 -0800 |
| commit | 9bb89175e6487186389b69e8ee0b587d38ed8015 (patch) | |
| tree | e1aa28ac935aac1f5d089ad88bd7b7f26f3d1207 /src/mesa/drivers/dri/i965/brw_tes.c | |
| parent | faa1edeeb7bbe9321c79587e592dce812e8caa78 (diff) | |
compiler: Change shader_info->tes.vertex_order into a ccw boolean.
The vertex order is either clockwise or counterclockwise. We can just
store a "ccw" boolean rather than GLenum values. I don't want to use
GLenums in a Vulkan driver, and even in GL a simple boolean works fine.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_tes.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_tes.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c index 06862df8346..2dae1e57f41 100644 --- a/src/mesa/drivers/dri/i965/brw_tes.c +++ b/src/mesa/drivers/dri/i965/brw_tes.c @@ -127,16 +127,9 @@ brw_codegen_tes_prog(struct brw_context *brw, prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE; } else { /* Hardware winding order is backwards from OpenGL */ - switch (tep->program.info.tes.vertex_order) { - case GL_CCW: - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW; - break; - case GL_CW: - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW; - break; - default: - unreachable("invalid domain shader vertex order"); - } + prog_data.output_topology = + tep->program.info.tes.ccw ? BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW + : BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW; } /* Allocate the references to the uniforms that will end up in the |