diff options
author | Eric Anholt <[email protected]> | 2012-12-06 10:55:26 -0800 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2012-12-11 10:12:41 -0800 |
commit | f606a42a3cad9dad27c207864417bcb20efa5c2e (patch) | |
tree | d041c48ca9e0a7aa2eb024bbfab290a17997e64a /src/mesa/drivers/dri/i965/brw_structs.h | |
parent | 7d404a4bd8feb1a6575774d8eec7bc993c8e095e (diff) |
i965: Correct the name and usage of the flag subregister number field.
We've been calling it a register number, it's actually the subregister,
and things will get confusing once we start using it if it isn't fixed.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_structs.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_structs.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index 64bc1611832..ac817b9ee48 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -1064,7 +1064,7 @@ struct brw_instruction GLuint src0_horiz_stride:2; GLuint src0_width:3; GLuint src0_vert_stride:4; - GLuint flag_reg_nr:1; + GLuint flag_subreg_nr:1; GLuint pad:6; } da1; @@ -1078,7 +1078,7 @@ struct brw_instruction GLuint src0_horiz_stride:2; GLuint src0_width:3; GLuint src0_vert_stride:4; - GLuint flag_reg_nr:1; + GLuint flag_subreg_nr:1; GLuint pad:6; } ia1; @@ -1095,7 +1095,7 @@ struct brw_instruction GLuint src0_swz_w:2; GLuint pad0:1; GLuint src0_vert_stride:4; - GLuint flag_reg_nr:1; + GLuint flag_subreg_nr:1; GLuint pad1:6; } da16; @@ -1112,7 +1112,7 @@ struct brw_instruction GLuint src0_swz_w:2; GLuint pad0:1; GLuint src0_vert_stride:4; - GLuint flag_reg_nr:1; + GLuint flag_subreg_nr:1; GLuint pad1:6; } ia16; @@ -1545,7 +1545,7 @@ struct brw_compact_instruction { unsigned sub_reg_index:5; /* 18-22 */ unsigned acc_wr_control:1; /* 23-23 */ unsigned conditionalmod:4; /* 24-27 */ - unsigned flag_reg_nr:1; /* 28-28 */ + unsigned flag_subreg_nr:1; /* 28-28 */ unsigned cmpt_ctrl:1; /* 29-29 */ unsigned src0_index:2; /* 30-31 */ } dw0; |