diff options
| author | Chris Wilson <[email protected]> | 2015-04-30 17:04:51 +0100 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2015-06-24 10:35:04 -0700 |
| commit | 4b35ab9bdb4e663f41ff5c9ae5bbcc650b6093f9 (patch) | |
| tree | 623f9d02e44c1601d8abf09fa89e7fd06186aa83 /src/mesa/drivers/dri/i965/brw_state_upload.c | |
| parent | 9d4b9f1e0c661e5ed8ce2e71c76ce8cc1adf90dd (diff) | |
i965: Rename intel_emit* to reflect their new location in brw_pipe_control
Signed-off-by: Chris Wilson <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 08d1ac28885..7662c3b580c 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -349,7 +349,7 @@ brw_upload_initial_gpu_state(struct brw_context *brw) return; if (brw->gen == 6) - intel_emit_post_sync_nonzero_flush(brw); + brw_emit_post_sync_nonzero_flush(brw); brw_upload_invariant_state(brw); @@ -710,7 +710,7 @@ brw_upload_pipeline_state(struct brw_context *brw, /* Emit Sandybridge workaround flushes on every primitive, for safety. */ if (brw->gen == 6) - intel_emit_post_sync_nonzero_flush(brw); + brw_emit_post_sync_nonzero_flush(brw); brw_upload_programs(brw, pipeline); merge_ctx_state(brw, &state); |