diff options
author | Paul Berry <[email protected]> | 2012-04-29 21:41:42 -0700 |
---|---|---|
committer | Paul Berry <[email protected]> | 2012-05-15 15:09:23 -0700 |
commit | 19e9b24626c2b9d7abef054d57bb2a52106c545b (patch) | |
tree | 400b049b32a91ad064f94dadd38929f6a65b6768 /src/mesa/drivers/dri/i965/brw_state_upload.c | |
parent | 506d70be21cd3469118de89297cba0c0f709c1ae (diff) |
i965/gen6: Initial implementation of MSAA.
This patch enables MSAA for Gen6, by modifying intel_mipmap_tree to
understand multisampled buffers, adapting the rendering pipeline setup
to enable multisampled rendering, and adding multisample resolve
operations to brw_blorp_blit.cpp. Some preparation work is also
included for Gen7, but it is not yet enabled.
MSAA support is still fairly preliminary. In particular, the
following are not yet supported:
- Fully general blits between MSAA and non-MSAA buffers.
- Formats other than RGBA8, DEPTH24, and STENCIL8.
- Centroid interpolation.
- Coverage parameters (glSampleCoverage, GL_SAMPLE_ALPHA_TO_COVERAGE,
GL_SAMPLE_ALPHA_TO_ONE, GL_SAMPLE_COVERAGE, GL_SAMPLE_COVERAGE_VALUE,
GL_SAMPLE_COVERAGE_INVERT).
Fixes piglit tests "EXT_framebuffer_multisample/accuracy" on
i965/Gen6.
v2:
- In intel_alloc_renderbuffer_storage(), quantize the requested number
of samples to the next higher sample count supported by the
hardware. This ensures that a query of GL_SAMPLES will return the
correct value. It also ensures that MSAA is fully disabled on Gen7
for now (since Gen7 MSAA support doesn't work yet).
- When reading from a non-MSAA surface, ensure that s_is_zero is true
so that we won't try to read from a nonexistent sample.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index b02e1600d62..551fa6a5df1 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -153,6 +153,7 @@ static const struct brw_tracked_state *gen6_atoms[] = &brw_samplers, &gen6_sampler_state, + &gen6_multisample_state, /* TODO: is this the right spot? */ &gen6_vs_state, &gen6_gs_state, @@ -221,6 +222,7 @@ const struct brw_tracked_state *gen7_atoms[] = &brw_wm_binding_table, &gen7_samplers, + &gen6_multisample_state, /* TODO: is this the right spot? */ &gen7_disable_stages, &gen7_vs_state, |