diff options
author | Jason Ekstrand <[email protected]> | 2015-10-08 17:09:54 -0700 |
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committer | Jason Ekstrand <[email protected]> | 2015-10-19 08:47:03 -0700 |
commit | 6980372010ad5929c0b4b0a0370d281cbd6f8b2e (patch) | |
tree | f9199c4e5a5481db70e324b374abddf198f9a27a /src/mesa/drivers/dri/i965/brw_shader.h | |
parent | 4467344c829f1dccdf74e27bef2c5fda72552be6 (diff) |
i965: Move the entire compiler API into a single file
At this point, the compiler API has been substantially simplified. In the
spirit of Kristian's making a compiler library, this commit makes a single
header file that contains, more-or-less, the entire compiler API.
There's still a bit of cleanup to do particularly in the area of geometry
shaders. However, this gets us much closer to having a separate compiler.
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index 6d4cf048390..b33b08f40d7 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -38,64 +38,6 @@ #define MAX_SAMPLER_MESSAGE_SIZE 11 #define MAX_VGRF_SIZE 16 -struct brw_compiler { - const struct brw_device_info *devinfo; - - struct { - struct ra_regs *regs; - - /** - * Array of the ra classes for the unaligned contiguous register - * block sizes used. - */ - int *classes; - - /** - * Mapping for register-allocated objects in *regs to the first - * GRF for that object. - */ - uint8_t *ra_reg_to_grf; - } vec4_reg_set; - - struct { - struct ra_regs *regs; - - /** - * Array of the ra classes for the unaligned contiguous register - * block sizes used, indexed by register size. - */ - int classes[16]; - - /** - * Mapping from classes to ra_reg ranges. Each of the per-size - * classes corresponds to a range of ra_reg nodes. This array stores - * those ranges in the form of first ra_reg in each class and the - * total number of ra_reg elements in the last array element. This - * way the range of the i'th class is given by: - * [ class_to_ra_reg_range[i], class_to_ra_reg_range[i+1] ) - */ - int class_to_ra_reg_range[17]; - - /** - * Mapping for register-allocated objects in *regs to the first - * GRF for that object. - */ - uint8_t *ra_reg_to_grf; - - /** - * ra class for the aligned pairs we use for PLN, which doesn't - * appear in *classes. - */ - int aligned_pairs_class; - } fs_reg_sets[2]; - - void (*shader_debug_log)(void *, const char *str, ...) PRINTFLIKE(2, 3); - void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3); - - bool scalar_vs; - struct gl_shader_compiler_options glsl_compiler_options[MESA_SHADER_STAGES]; -}; - enum PACKED register_file { BAD_FILE, GRF, |