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authorFrancisco Jerez <[email protected]>2016-09-07 13:38:20 -0700
committerFrancisco Jerez <[email protected]>2016-09-14 14:50:53 -0700
commit69570bbad876bb9da609c3b651aacda28cecc542 (patch)
tree11f5930c4426d05b013ab874e489a3c8a1d51c7a /src/mesa/drivers/dri/i965/brw_shader.h
parentd28cfa35fec75c367b940ff829ba8eaa035fbd22 (diff)
i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.
The previous regs_written field can be recovered by rewriting each rvalue reference of regs_written like 'x = i.regs_written' to 'x = DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference like 'i.regs_written = x' to 'i.size_written = x * reg_unit'. For the same reason as in the previous patches, this doesn't attempt to be particularly clever about simplifying the result in the interest of keeping the rather lengthy patch as obvious as possible. I'll come back later to clean up any ugliness introduced here. Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 66264b4ea7e..2173f3226e1 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -138,6 +138,7 @@ struct backend_instruction {
int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint8_t target; /**< MRT target. */
uint8_t regs_written; /**< Number of registers written by the instruction. */
+ unsigned size_written; /**< Data written to the destination register in bytes. */
enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */