diff options
| author | Francisco Jerez <[email protected]> | 2016-07-01 13:46:40 -0700 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2016-08-25 18:36:06 -0700 |
| commit | 08705badfe136e1782e10472104323d861185357 (patch) | |
| tree | dafd3c28bdf7edb1ae626774b608a5b6590fa248 /src/mesa/drivers/dri/i965/brw_shader.h | |
| parent | 40b23ad57e8da0fd7af21e81ad52d615f9b492ed (diff) | |
i965: Allocate space in the binding table for non-coherent FB fetch.
Unfortunately due to the inconsistent meaning of some surface state
structure fields, we cannot re-use the same binding table entries for
sampling from and rendering into the same set of render buffers, so we
need to allocate a separate binding table block specifically for
render target reads if the non-coherent path is in use.
The slight noise is due to the change of
brw_assign_common_binding_table_offsets to return the next available
binding table index rather than void.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index e61c080311e..3b3be07b5ec 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -261,7 +261,7 @@ struct brw_gs_compile unsigned control_data_header_size_bits; }; -void +uint32_t brw_assign_common_binding_table_offsets(gl_shader_stage stage, const struct brw_device_info *devinfo, const struct gl_shader_program *shader_prog, |