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authorMatt Turner <[email protected]>2014-03-08 17:29:33 -0800
committerMatt Turner <[email protected]>2014-11-25 17:29:02 -0800
commitbf686b2785c63116ab4ab7e62eb77be51b97d346 (patch)
treed0891e7ddfa76ebd56db3e95fcaffa3a2236340b /src/mesa/drivers/dri/i965/brw_shader.cpp
parentcb0ba848d4176c1ed2c4542fd5875867f460fc3b (diff)
i965/vec4: Optimize unpackUnorm4x8().
Reduces the number of instructions needed to implement unpackUnorm4x8() from 11 -> 4. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 6a14932629a..6cb2da8641f 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -85,8 +85,11 @@ brw_lower_packing_builtins(struct brw_context *brw,
| LOWER_UNPACK_UNORM_2x16
| LOWER_PACK_SNORM_4x8
| LOWER_UNPACK_SNORM_4x8
- | LOWER_PACK_UNORM_4x8
- | LOWER_UNPACK_UNORM_4x8;
+ | LOWER_PACK_UNORM_4x8;
+
+ if (shader_type == MESA_SHADER_FRAGMENT) {
+ ops |= LOWER_UNPACK_UNORM_4x8;
+ }
if (brw->gen >= 7) {
/* Gen7 introduced the f32to16 and f16to32 instructions, which can be