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authorJordan Justen <[email protected]>2015-04-22 11:43:50 -0700
committerJordan Justen <[email protected]>2015-05-02 00:50:00 -0700
commit0e0e23ef537c9add672ff322f34e129a07edc55e (patch)
tree83afafb333af5e60d123ea923dad81bffa62fa20 /src/mesa/drivers/dri/i965/brw_misc_state.c
parent013031b2291e87f2559a67c2c54b9004c71ef91b (diff)
i965/state: Emit pipeline select when changing pipelines
Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_misc_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 78a46cb050d..67a693b5ec1 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -854,6 +854,22 @@ const struct brw_tracked_state brw_line_stipple = {
};
+void
+brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
+{
+ const bool is_965 = brw->gen == 4 && !brw->is_g4x;
+ const uint32_t _3DSTATE_PIPELINE_SELECT =
+ is_965 ? CMD_PIPELINE_SELECT_965 : CMD_PIPELINE_SELECT_GM45;
+
+ /* Select the pipeline */
+ BEGIN_BATCH(1);
+ OUT_BATCH(_3DSTATE_PIPELINE_SELECT << 16 |
+ (brw->gen >= 9 ? (3 << 8) : 0) |
+ (pipeline == BRW_COMPUTE_PIPELINE ? 2 : 0));
+ ADVANCE_BATCH();
+}
+
+
/***********************************************************************
* Misc invariant state packets
*/
@@ -863,12 +879,7 @@ brw_upload_invariant_state(struct brw_context *brw)
{
const bool is_965 = brw->gen == 4 && !brw->is_g4x;
- /* Select the 3D pipeline (as opposed to media) */
- const uint32_t _3DSTATE_PIPELINE_SELECT =
- is_965 ? CMD_PIPELINE_SELECT_965 : CMD_PIPELINE_SELECT_GM45;
- BEGIN_BATCH(1);
- OUT_BATCH(_3DSTATE_PIPELINE_SELECT << 16 | (brw->gen >= 9 ? (3 << 8) : 0));
- ADVANCE_BATCH();
+ brw_select_pipeline(brw, BRW_RENDER_PIPELINE);
if (brw->gen < 6) {
/* Disable depth offset clamping. */