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authorVille Syrjälä <[email protected]>2014-07-06 15:02:15 +0300
committerVille Syrjälä <[email protected]>2014-11-13 19:13:27 +0200
commit0d924738d9d86a19b9bffa01ba9f29f2f697bb27 (patch)
tree120ddde7449e6b7bec887907ee2efaa07168f6de /src/mesa/drivers/dri/i965/brw_misc_state.c
parent81c31e560f230eddb5c081b5526c43258c12a8ac (diff)
i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE
According to gen2 BSpec the pipeline must be flushed at least up to the windower before changing the scissor rect enable field. Emitting the 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient to do that. gen3 BSpec no longer has that piece of text, but let's make the same change there too for symmetry. The spec does still say that the scissor rectangle must be defined before enabling it, so the new order does seem more in line with the spec. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_misc_state.c')
0 files changed, 0 insertions, 0 deletions