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authorEric Anholt <[email protected]>2006-10-18 00:24:01 -0700
committerKeith Packard <[email protected]>2007-01-06 15:18:23 -0800
commit1b9f78195f62959601d440475a6cbba5e8046813 (patch)
treebf86214e2af04a045369df53e8c025366f533cf7 /src/mesa/drivers/dri/i965/brw_gs.c
parente54ec49155052ab663d8671e7036d985992464a3 (diff)
i965: Avoid branch instructions while in single program flow mode.
There is an errata for Broadwater that threads don't have the instruction/loop mask stacks initialized on thread spawn. In single program flow mode, those stacks are not writable, so we can't initialize them. However, they do get read during ELSE and ENDIF instructions. So, instead, replace branch instructions in single program flow mode with predicated jumps (ADD to the ip register), avoiding use of the more complicated branch instructions that may fail. This is also a minor optimization as no ENDIF equivalent is necessary. Signed-off-by: Keith Packard <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_gs.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 7d3f9dd5e3b..9066e42252d 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -66,7 +66,9 @@ static void compile_gs_prog( struct brw_context *brw,
/* Begin the compilation:
*/
brw_init_compile(&c.func);
-
+
+ c.func.single_program_flow = 1;
+
/* For some reason the thread is spawned with only 4 channels
* unmasked.
*/