diff options
| author | Eric Anholt <[email protected]> | 2012-12-05 00:06:30 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2012-12-14 15:18:05 -0800 |
| commit | 461a29783a28e579a9a5a236e5f47ffb6d18a328 (patch) | |
| tree | 989e37ae57e2a330c76070ab5d76d0fc8aeed0cc /src/mesa/drivers/dri/i965/brw_fs.h | |
| parent | 456dbcc3377ee23dbeffa4da02a4d80a8519bb62 (diff) | |
i965/fs: Set up gen7 UBO loads as sends from GRFs.
This gives the instruction scheduler a chance to schedule between the
loads, whereas before it was restricted due to the dependencies between
the MRFs for setting them up.
For one shader in gles3conform, it goes from getting stuck in register
allocation for as long as anybody's bothered to leave it running down
to 23 seconds, thanks to the LIFO scheduling.
Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index b75314cd665..87257123f27 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -529,6 +529,10 @@ private: void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst, struct brw_reg index, struct brw_reg offset); + void generate_uniform_pull_constant_load_gen7(fs_inst *inst, + struct brw_reg dst, + struct brw_reg surf_index, + struct brw_reg offset); void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst, struct brw_reg index); void generate_varying_pull_constant_load_gen7(fs_inst *inst, @@ -536,6 +540,10 @@ private: struct brw_reg index, struct brw_reg offset); void generate_mov_dispatch_to_flags(fs_inst *inst); + void generate_set_global_offset(fs_inst *inst, + struct brw_reg dst, + struct brw_reg src, + struct brw_reg offset); void generate_discard_jump(fs_inst *inst); void patch_discard_jumps_to_fb_writes(); |