i965: Fix CS scratch size calculations on Ivybridge and Baytrail.

These are linear, not powers of two, and much more limited.

Cc: "12.0" <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>

1 files changed, 6 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 8c0ec4ed27f..f1a1c87be5a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5995,6 +5995,12 @@ fs_visitor::allocate_registers(bool allow_spilling)
           * and platform.
           */
          prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
+      } else if (devinfo->gen <= 7 && stage == MESA_SHADER_COMPUTE) {
+         /* According to the MEDIAVFE_STATE's "Per Thread Scratch Space"
+          * field documentation, platforms prior to Haswell measure scratch
+          * size linearly with a range of [1kB, 12kB] and 1kB granularity.
+          */
+         prog_data->total_scratch = ALIGN(last_scratch, 1024);
       }
    }
 }