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authorZhenyu Wang <[email protected]>2010-04-19 15:51:50 +0800
committerZhenyu Wang <[email protected]>2010-04-21 10:11:02 +0800
commitcdcef6cbf4dd80047819e9098e34a3b98bd502a4 (patch)
tree712387517536e90d712c9851fc467ccbcf55a8ca /src/mesa/drivers/dri/i965/brw_draw_upload.c
parent9e258fc2bd6f2b9950606a0a92bb92c8959d9efd (diff)
intel: Clean up chipset name and gen num for Ironlake
Rename old IGDNG to Ironlake, and set 'gen' number for Ironlake as 5, so tracking the features with generation num instead of special is_ironlake flag. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_draw_upload.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 71a43577bfd..8247faa36d8 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -522,7 +522,7 @@ static void brw_emit_vertices(struct brw_context *brw)
OUT_RELOC(input->bo,
I915_GEM_DOMAIN_VERTEX, 0,
input->offset);
- if (intel->is_ironlake || intel->gen >= 6) {
+ if (intel->gen >= 5) {
OUT_RELOC(input->bo,
I915_GEM_DOMAIN_VERTEX, 0,
input->bo->size - 1);
@@ -565,7 +565,7 @@ static void brw_emit_vertices(struct brw_context *brw)
(0 << BRW_VE0_SRC_OFFSET_SHIFT));
}
- if (intel->is_ironlake || intel->gen >= 6)
+ if (intel->gen >= 5)
OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
(comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
(comp2 << BRW_VE1_COMPONENT_2_SHIFT) |