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authorChris Wilson <[email protected]>2011-02-18 10:37:43 +0000
committerChris Wilson <[email protected]>2011-02-21 12:59:36 +0000
commitc625aa19cb53ed27f91bfd16fea6ea727e9a5bbd (patch)
tree86187fe82a7410ac0732aa110271f4659281b107 /src/mesa/drivers/dri/i965/brw_draw.c
parenta07e4811794051dc65187d17b7f85e340e61854e (diff)
intel: extend current vertex buffers
If the next vertex arrays are a (discontiguous) continuation of the current arrays, such that the new vertices are simply offset from the start of the current vertex buffer definitions we can reuse those defintions and avoid the overhead of relocations and invalidations. Signed-off-by: Chris Wilson <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_draw.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 3431d29b050..f5abe021c43 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -145,9 +145,14 @@ static void brw_emit_prim(struct brw_context *brw,
prim_packet.start_vert_location = prim->start;
if (prim->indexed)
prim_packet.start_vert_location += brw->ib.start_vertex_offset;
+ else
+ prim_packet.start_vert_location += brw->vb.start_vertex_bias;
prim_packet.instance_count = 1;
prim_packet.start_instance_location = 0;
prim_packet.base_vert_location = prim->basevertex;
+ if (prim->indexed)
+ prim_packet.base_vert_location += brw->vb.start_vertex_bias;
+
/* If we're set to always flush, do it before and after the primitive emit.
* We want to catch both missed flushes that hurt instruction/state cache