diff options
| author | Eric Anholt <[email protected]> | 2012-10-31 13:39:26 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2012-11-04 11:15:44 -0800 |
| commit | 1e08d5452eaf80d63e626119142facc6c549a58e (patch) | |
| tree | 6afbca054b0b1864e47655531f2484a63010a9c2 /src/mesa/drivers/dri/i965/brw_draw.c | |
| parent | 29a6307e12e132104ce42ad3b83e377ca34880a7 (diff) | |
i965: Fix uploading user vertex arrays with basevertex set.
If the index buffer is full of values like "0 1 2 3", but basevertex is 4, we
need to upload at least vertex data for elements 4 5 6 7. Whether we also
upload 0 1 2 3 is a question of whether there are VBOs present or not -- see
the code setting start_vertex_bias in brw_draw_upload.c.
Fixes piglit draw-elements*base-vertex user_varrays
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_draw.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 22d18f91705..97a10771877 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -478,6 +478,10 @@ static bool brw_try_draw_prims( struct gl_context *ctx, brw->num_instances = prim->num_instances; brw->state.dirty.brw |= BRW_NEW_VERTICES; } + if (brw->basevertex != prim->basevertex) { + brw->basevertex = prim->basevertex; + brw->state.dirty.brw |= BRW_NEW_VERTICES; + } if (intel->gen < 6) brw_set_prim(brw, &prim[i]); else |