diff options
| author | Kenneth Graunke <[email protected]> | 2015-05-06 00:04:10 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2015-10-21 14:27:41 -0700 |
| commit | bea75227829512ab0e4766e00ac1b509c7586667 (patch) | |
| tree | ac8d23dd58729b2ba0dc1fc1ce187cdf04e945da /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 0e57694745979286cda0cd414cc6d1f4efe5408b (diff) | |
i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.
In the vec4 backend, we have a vec4_instruction::urb_write_flags field.
There are many kinds of flags for SIMD4x2 messages.
However, there are really only two (per-slot offset, use channel masks)
for SIMD8 messages. Rather than adding a boolean flag for per-slot
offsets (polluting all instructions), I decided to just make three new
opcodes.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index e61ad545744..b2ce197faba 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1032,6 +1032,9 @@ enum opcode { SHADER_OPCODE_GEN7_SCRATCH_READ, SHADER_OPCODE_URB_WRITE_SIMD8, + SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT, + SHADER_OPCODE_URB_WRITE_SIMD8_MASKED, + SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT, /** * Return the index of an arbitrary live channel (i.e. one of the channels |