diff options
| author | Paul Berry <[email protected]> | 2011-12-02 14:38:52 -0800 |
|---|---|---|
| committer | Paul Berry <[email protected]> | 2011-12-07 16:38:01 -0800 |
| commit | 2252e5e3f1e8caece5c73df82f3ddf306baa2c91 (patch) | |
| tree | 82a91219f2dcf32de7649312d4c099813dc3dca7 /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 3f2283172bcaf3db00a99baad0319bc7e0be5fc2 (diff) | |
i965: Clean up misleading defines for DWORD 2 of URB_WRITE header.
R02_PRIM_END and R02_PRIM_START don't actually refer to bits in DWORD
2 of R0 (as the name, and comments in the code, would seem to
indicate). Actually they refer to bits in DWORD 2 of the header for
URB_WRITE messages.
This patch renames the defines to reflect what they actually mean. It
also addes a define URB_WRITE_PRIM_TYPE_SHIFT, which previously was
just hardcoded in .c files.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index bb79bfbafdf..d94923195d5 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1413,10 +1413,10 @@ enum brw_wm_barycentric_interp_mode { #define CMD_MI_FLUSH 0x0200 -/* Various values from the R0 vertex header: - */ -#define R02_PRIM_END 0x1 -#define R02_PRIM_START 0x2 +/* Bitfields for the URB_WRITE message, DW2 of message header: */ +#define URB_WRITE_PRIM_END 0x1 +#define URB_WRITE_PRIM_START 0x2 +#define URB_WRITE_PRIM_TYPE_SHIFT 2 #include "intel_chipset.h" |