diff options
| author | Anuj Phogat <[email protected]> | 2015-04-14 22:06:48 -0700 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2015-06-16 14:52:48 -0700 |
| commit | 06687564479be1a2eed5842cfe4ad85dd099261b (patch) | |
| tree | 72d2fb3a2a4076373a74e0616c4cbbba2a89e203 /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 6b8accb36b541f77774109ea42533c02bb90bc68 (diff) | |
i965/gen9: Set tiled resource mode in surface state
This patch sets the tiled resource mode for texture and renderbuffer
surfaces.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 2a8fc0beea4..54e5a8f78bc 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -592,6 +592,12 @@ #define GEN7_SURFACE_MOCS_SHIFT 16 #define GEN7_SURFACE_MOCS_MASK INTEL_MASK(19, 16) +#define GEN9_SURFACE_TRMODE_SHIFT 18 +#define GEN9_SURFACE_TRMODE_MASK INTEL_MASK(19, 18) +#define GEN9_SURFACE_TRMODE_NONE 0 +#define GEN9_SURFACE_TRMODE_TILEYF 1 +#define GEN9_SURFACE_TRMODE_TILEYS 2 + /* Surface state DW6 */ #define GEN7_SURFACE_MCS_ENABLE (1 << 0) #define GEN7_SURFACE_MCS_PITCH_SHIFT 3 |