diff options
| author | Zhenyu Wang <[email protected]> | 2010-04-19 15:51:50 +0800 |
|---|---|---|
| committer | Zhenyu Wang <[email protected]> | 2010-04-21 10:11:02 +0800 |
| commit | cdcef6cbf4dd80047819e9098e34a3b98bd502a4 (patch) | |
| tree | 712387517536e90d712c9851fc467ccbcf55a8ca /src/mesa/drivers/dri/i965/brw_context.c | |
| parent | 9e258fc2bd6f2b9950606a0a92bb92c8959d9efd (diff) | |
intel: Clean up chipset name and gen num for Ironlake
Rename old IGDNG to Ironlake, and set 'gen' number for
Ironlake as 5, so tracking the features with generation num
instead of special is_ironlake flag.
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Zhenyu Wang <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 241193c3579..360fc12621a 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -150,7 +150,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, MIN2(ctx->Const.FragmentProgram.MaxNativeParameters, ctx->Const.FragmentProgram.MaxEnvParams); - if (intel->is_ironlake || intel->is_g4x || intel->gen >= 6) { + if (intel->is_g4x || intel->gen >= 5) { brw->CMD_VF_STATISTICS = CMD_VF_STATISTICS_GM45; brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45; brw->has_surface_tile_offset = GL_TRUE; @@ -163,7 +163,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, } /* WM maximum threads is number of EUs times number of threads per EU. */ - if (intel->is_ironlake) { + if (intel->gen == 5) { brw->urb.size = 1024; brw->vs_max_threads = 72; brw->wm_max_threads = 12 * 6; |