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authorChris Wilson <[email protected]>2017-04-11 15:24:54 +0100
committerChris Wilson <[email protected]>2017-10-20 11:28:17 +0100
commit1617fca6d12e418e02d18733dd0d1964c7ecbda9 (patch)
tree48bc5b88e5b04381af4b63ceef67b5e4f7a92a01 /src/mesa/drivers/dri/i965/brw_context.c
parent21023954f898bf871696e6e0eae2848e019fb2f9 (diff)
i965: Pass the EGL/DRI context priority through to the kernel
Decode the EGL/DRI priority enum into the [-1023, 1023] range as interpreted by the kernel and call DRM_I915_GEM_CONTEXT_SETPARAM to adjust the priority. We use 0 as the default medium priority (also the kernel default) and so only need adjust up or down. By only doing the adjustment if not setting to medium, we can faithfully report any error whilst setting without worrying about kernel version. Signed-off-by: Chris Wilson <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index a86367cc46b..c8de0746387 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -956,6 +956,24 @@ brwCreateContext(gl_api api,
intelDestroyContext(driContextPriv);
return false;
}
+
+ int hw_priority = BRW_CONTEXT_MEDIUM_PRIORITY;
+ switch (priority) {
+ case __DRI_CTX_PRIORITY_LOW:
+ hw_priority = BRW_CONTEXT_LOW_PRIORITY;
+ break;
+ case __DRI_CTX_PRIORITY_HIGH:
+ hw_priority = BRW_CONTEXT_HIGH_PRIORITY;
+ break;
+ }
+ if (hw_priority != I915_CONTEXT_DEFAULT_PRIORITY &&
+ brw_hw_context_set_priority(brw->bufmgr, brw->hw_ctx, hw_priority)) {
+ fprintf(stderr,
+ "Failed to set priority [%d:%d] for hardware context.\n",
+ priority, hw_priority);
+ intelDestroyContext(driContextPriv);
+ return false;
+ }
}
if (brw_init_pipe_control(brw, devinfo)) {