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authorXiang, Haihao <[email protected]>2007-08-10 16:23:14 +0800
committerXiang, Haihao <[email protected]>2007-08-10 16:23:14 +0800
commit8ea66fa2ec9eeb6a7e869ff08d713f5e77d795e0 (patch)
tree482afc0367d88d6036448a3279b7230d44912ed9 /src/mesa/drivers/dri/i915tex
parent2cafd749b8e4fa44863c176389f7201c7f74eca9 (diff)
i965/i915tex: applying right alignment to compressed texture,
which make small textures(4x4,2x2,1x1) work well.
Diffstat (limited to 'src/mesa/drivers/dri/i915tex')
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
index 843a78eb82b..fc38a28290d 100644
--- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
@@ -325,6 +325,7 @@ intel_miptree_image_data(struct intel_context *intel,
}
}
+extern GLuint intel_compressed_alignment(GLenum);
/* Copy mipmap image between trees
*/
void
@@ -342,8 +343,12 @@ intel_miptree_image_copy(struct intel_context *intel,
const GLuint *src_depth_offset = intel_miptree_depth_offsets(src, level);
GLuint i;
- if (dst->compressed)
- height /= 4;
+ if (dst->compressed) {
+ GLuint alignment = intel_compressed_alignment(dst->internal_format);
+ height = (height + 3) / 4;
+ width = ((width + alignment - 1) & ~(alignment - 1));
+ }
+
for (i = 0; i < depth; i++) {
intel_region_copy(intel->intelScreen,
dst->region, dst_offset + dst_depth_offset[i],