mesa: Change many Type P MESA_FORMATs to meet naming spec

Conversion of Type P formats as follows (w/related comment fixes):
    s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
    s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
    s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
    s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
    s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
    s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
    s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
    s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
    s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
    s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
    s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
    s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
    s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
    s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
    s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
    s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
    s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
    s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
    s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
    s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
    s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
    s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
    s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
    s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
    s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
    s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
    s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
    s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
    s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
    s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
    s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
    s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
    s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
    s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g

Conflicts:
	src/mesa/drivers/dri/i965/brw_surface_formats.c
	src/mesa/main/format_pack.c
	src/mesa/main/format_unpack.c
	src/mesa/main/formats.c
	src/mesa/main/texformat.c
	src/mesa/main/texstore.c

10 files changed, 44 insertions, 44 deletions

diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 4e90761497f..7209655c167 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -49,13 +49,13 @@ translate_texture_format(GLuint mesa_format)
       return MAPSURF_8BIT | MT_8BIT_I8;
    case MESA_FORMAT_A_UNORM8:
       return MAPSURF_8BIT | MT_8BIT_I8; /* Kludge! */
-   case MESA_FORMAT_AL88:
+   case MESA_FORMAT_L8A8_UNORM:
       return MAPSURF_16BIT | MT_16BIT_AY88;
-   case MESA_FORMAT_RGB565:
+   case MESA_FORMAT_B5G6R5_UNORM:
       return MAPSURF_16BIT | MT_16BIT_RGB565;
-   case MESA_FORMAT_ARGB1555:
+   case MESA_FORMAT_B5G5R5A1_UNORM:
       return MAPSURF_16BIT | MT_16BIT_ARGB1555;
-   case MESA_FORMAT_ARGB4444:
+   case MESA_FORMAT_B4G4R4A4_UNORM:
       return MAPSURF_16BIT | MT_16BIT_ARGB4444;
    case MESA_FORMAT_B8G8R8A8_UNORM:
       return MAPSURF_32BIT | MT_32BIT_ARGB8888;
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 49c29939c0d..0d3e3e233d4 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -584,9 +584,9 @@ static uint32_t i830_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] =
 {
    [MESA_FORMAT_B8G8R8A8_UNORM] = DV_PF_8888,
    [MESA_FORMAT_B8G8R8X8_UNORM] = DV_PF_8888,
-   [MESA_FORMAT_RGB565] = DV_PF_565,
-   [MESA_FORMAT_ARGB1555] = DV_PF_1555,
-   [MESA_FORMAT_ARGB4444] = DV_PF_4444,
+   [MESA_FORMAT_B5G6R5_UNORM] = DV_PF_565,
+   [MESA_FORMAT_B5G5R5A1_UNORM] = DV_PF_1555,
+   [MESA_FORMAT_B4G4R4A4_UNORM] = DV_PF_4444,
 };
 
 static bool
@@ -595,8 +595,8 @@ i830_render_target_supported(struct intel_context *intel,
 {
    mesa_format format = rb->Format;
 
-   if (format == MESA_FORMAT_S8_Z24 ||
-       format == MESA_FORMAT_X8_Z24 ||
+   if (format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
+       format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
        format == MESA_FORMAT_Z_UNORM16) {
       return true;
    }
@@ -804,7 +804,7 @@ i830_update_draw_buffer(struct intel_context *intel)
 
    /* Check for stencil fallback. */
    if (irbStencil && irbStencil->mt) {
-      assert(intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24);
+      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
    } else if (irbStencil && !irbStencil->mt) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
@@ -817,7 +817,7 @@ i830_update_draw_buffer(struct intel_context *intel)
     * we still need to set up the shared depth/stencil state so we can use it.
     */
    if (depthRegion == NULL && irbStencil && irbStencil->mt
-       && intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24) {
+       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) {
       depthRegion = irbStencil->mt->region;
    }
 
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index bdb07294039..4cf6acc34c4 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -104,18 +104,18 @@ intel_init_texture_formats(struct gl_context *ctx)
        intel_screen->deviceID != PCI_CHIP_845_G)
       ctx->TextureFormatSupported[MESA_FORMAT_B8G8R8X8_UNORM] = true;
    if (intel->gen == 3)
-      ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = true;
-   ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = true;
-   ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = true;
-   ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = true;
+      ctx->TextureFormatSupported[MESA_FORMAT_B8G8R8A8_SRGB] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_B4G4R4A4_UNORM] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_B5G5R5A1_UNORM] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_B5G6R5_UNORM] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_L_UNORM8] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_A_UNORM8] = true;
    ctx->TextureFormatSupported[MESA_FORMAT_I_UNORM8] = true;
-   ctx->TextureFormatSupported[MESA_FORMAT_AL88] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_L8A8_UNORM] = true;
 
    /* Depth and stencil */
-   ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true;
-   ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
+   ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
 
    /*
     * This was disabled in initial FBO enabling to avoid combinations
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index ffca3901ca3..4f4b693f0f0 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -48,15 +48,15 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode)
       return MAPSURF_8BIT | MT_8BIT_I8;
    case MESA_FORMAT_A_UNORM8:
       return MAPSURF_8BIT | MT_8BIT_A8;
-   case MESA_FORMAT_AL88:
+   case MESA_FORMAT_L8A8_UNORM:
       return MAPSURF_16BIT | MT_16BIT_AY88;
-   case MESA_FORMAT_RGB565:
+   case MESA_FORMAT_B5G6R5_UNORM:
       return MAPSURF_16BIT | MT_16BIT_RGB565;
-   case MESA_FORMAT_ARGB1555:
+   case MESA_FORMAT_B5G5R5A1_UNORM:
       return MAPSURF_16BIT | MT_16BIT_ARGB1555;
-   case MESA_FORMAT_ARGB4444:
+   case MESA_FORMAT_B4G4R4A4_UNORM:
       return MAPSURF_16BIT | MT_16BIT_ARGB4444;
-   case MESA_FORMAT_SARGB8:
+   case MESA_FORMAT_B8G8R8A8_SRGB:
    case MESA_FORMAT_B8G8R8A8_UNORM:
       return MAPSURF_32BIT | MT_32BIT_ARGB8888;
    case MESA_FORMAT_B8G8R8X8_UNORM:
@@ -88,8 +88,8 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode)
    case MESA_FORMAT_RGBA_DXT5:
    case MESA_FORMAT_SRGBA_DXT5:
       return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
-   case MESA_FORMAT_S8_Z24:
-   case MESA_FORMAT_X8_Z24:
+   case MESA_FORMAT_Z24_UNORM_X8_UINT:
+   case MESA_FORMAT_Z24_UNORM_S8_UINT:
       if (DepthMode == GL_ALPHA)
 	 return (MAPSURF_32BIT | MT_32BIT_x8A24);
       else if (DepthMode == GL_INTENSITY)
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index e263da0d79a..0ab616c099f 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -551,9 +551,9 @@ static uint32_t i915_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] =
 {
    [MESA_FORMAT_B8G8R8A8_UNORM] = DV_PF_8888,
    [MESA_FORMAT_B8G8R8X8_UNORM] = DV_PF_8888,
-   [MESA_FORMAT_RGB565] = DV_PF_565 | DITHER_FULL_ALWAYS,
-   [MESA_FORMAT_ARGB1555] = DV_PF_1555 | DITHER_FULL_ALWAYS,
-   [MESA_FORMAT_ARGB4444] = DV_PF_4444 | DITHER_FULL_ALWAYS,
+   [MESA_FORMAT_B5G6R5_UNORM] = DV_PF_565 | DITHER_FULL_ALWAYS,
+   [MESA_FORMAT_B5G5R5A1_UNORM] = DV_PF_1555 | DITHER_FULL_ALWAYS,
+   [MESA_FORMAT_B4G4R4A4_UNORM] = DV_PF_4444 | DITHER_FULL_ALWAYS,
 };
 
 static bool
@@ -562,8 +562,8 @@ i915_render_target_supported(struct intel_context *intel,
 {
    mesa_format format = rb->Format;
 
-   if (format == MESA_FORMAT_S8_Z24 ||
-       format == MESA_FORMAT_X8_Z24 ||
+   if (format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
+       format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
        format == MESA_FORMAT_Z_UNORM16) {
       return true;
    }
@@ -777,7 +777,7 @@ i915_update_draw_buffer(struct intel_context *intel)
 
    /* Check for stencil fallback. */
    if (irbStencil && irbStencil->mt) {
-      assert(intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24);
+      assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
    } else if (irbStencil && !irbStencil->mt) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
@@ -790,7 +790,7 @@ i915_update_draw_buffer(struct intel_context *intel)
     * we still need to set up the shared depth/stencil state so we can use it.
     */
    if (depthRegion == NULL && irbStencil && irbStencil->mt
-       && intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24) {
+       && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) {
       depthRegion = irbStencil->mt->region;
    }
 
diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c
index 5e9fc5ba625..d4e269dc841 100644
--- a/src/mesa/drivers/dri/i915/intel_blit.c
+++ b/src/mesa/drivers/dri/i915/intel_blit.c
@@ -455,14 +455,14 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask)
 	    clear_val = PACK_COLOR_8888(clear[3], clear[0],
 					clear[1], clear[2]);
 	    break;
-	 case MESA_FORMAT_RGB565:
+	 case MESA_FORMAT_B5G6R5_UNORM:
 	    clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
 	    break;
-	 case MESA_FORMAT_ARGB4444:
+	 case MESA_FORMAT_B4G4R4A4_UNORM:
 	    clear_val = PACK_COLOR_4444(clear[3], clear[0],
 					clear[1], clear[2]);
 	    break;
-	 case MESA_FORMAT_ARGB1555:
+	 case MESA_FORMAT_B5G5R5A1_UNORM:
 	    clear_val = PACK_COLOR_1555(clear[3], clear[0],
 					clear[1], clear[2]);
 	    break;
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c
index 735f3460f6a..161a1d62216 100644
--- a/src/mesa/drivers/dri/i915/intel_fbo.c
+++ b/src/mesa/drivers/dri/i915/intel_fbo.c
@@ -194,7 +194,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* These aren't actual texture formats, so force them here. */
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT;
       break;
    }
 
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c
index 09ced23a8b3..f4a2293e6da 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c
@@ -232,7 +232,7 @@ do_blit_bitmap( struct gl_context *ctx,
    case MESA_FORMAT_B8G8R8X8_UNORM:
       color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);
       break;
-   case MESA_FORMAT_RGB565:
+   case MESA_FORMAT_B5G6R5_UNORM:
       color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);
       break;
    default:
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 9b0262a4a79..f3c0fa32320 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -857,9 +857,9 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
    _mesa_initialize_window_framebuffer(fb, mesaVis);
 
    if (mesaVis->redBits == 5)
-      rgbFormat = MESA_FORMAT_RGB565;
+      rgbFormat = MESA_FORMAT_B5G6R5_UNORM;
    else if (mesaVis->sRGBCapable)
-      rgbFormat = MESA_FORMAT_SARGB8;
+      rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB;
    else if (mesaVis->alphaBits == 0)
       rgbFormat = MESA_FORMAT_B8G8R8X8_UNORM;
    else
@@ -886,7 +886,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
        * Use combined depth/stencil. Note that the renderbuffer is
        * attached to two attachment points.
        */
-      rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24);
+      rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT);
       _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
       _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
    }
@@ -1043,7 +1043,7 @@ static __DRIconfig**
 intel_screen_make_configs(__DRIscreen *dri_screen)
 {
    static const mesa_format formats[] = {
-      MESA_FORMAT_RGB565,
+      MESA_FORMAT_B5G6R5_UNORM,
       MESA_FORMAT_B8G8R8A8_UNORM
    };
 
@@ -1069,7 +1069,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
       depth_bits[0] = 0;
       stencil_bits[0] = 0;
 
-      if (formats[i] == MESA_FORMAT_RGB565) {
+      if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
          depth_bits[1] = 16;
          stencil_bits[1] = 0;
       } else {
@@ -1093,7 +1093,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
       __DRIconfig **new_configs;
 
-      if (formats[i] == MESA_FORMAT_RGB565) {
+      if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
          depth_bits[0] = 16;
          stencil_bits[0] = 0;
       } else {
diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c
index 6aa11411439..57674b9b5cf 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_image.c
@@ -317,7 +317,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
       }
    } else if (rb->mt->cpp == 2) {
       internalFormat = GL_RGB;
-      texFormat = MESA_FORMAT_RGB565;
+      texFormat = MESA_FORMAT_B5G6R5_UNORM;
    }
 
    _mesa_lock_texture(&intel->ctx, texObj);