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authorMathias Fröhlich <[email protected]>2011-10-31 18:32:59 +0100
committerMathias Fröhlich <[email protected]>2011-11-29 06:35:44 +0100
commitdca6a28a14f22d77273d79d44f57b0d853c0242d (patch)
treec917c9372e56b864262991cf82f48b62b9625bc2 /src/mesa/drivers/dri/i915
parentf364ac1da10ff67eba5196c1074aff579864f741 (diff)
mesa: Make gl_program::InputsRead 64 bits.
Make gl_program::InputsRead a 64 bits bitfield. Adapt the intel and radeon driver to handle a 64 bits InputsRead value. Signed-off-by: Mathias Froehlich <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 063e155d289..4f016a3f69d 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1148,7 +1148,7 @@ fixup_depth_write(struct i915_fragment_program *p)
static void
check_wpos(struct i915_fragment_program *p)
{
- GLuint inputs = p->FragProg.Base.InputsRead;
+ GLbitfield64 inputs = p->FragProg.Base.InputsRead;
GLint i;
p->wpos_tex = -1;
@@ -1337,7 +1337,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
struct i915_fragment_program *p =
(struct i915_fragment_program *) ctx->FragmentProgram._Current;
- const GLuint inputsRead = p->FragProg.Base.InputsRead;
+ const GLbitfield64 inputsRead = p->FragProg.Base.InputsRead;
GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
GLuint s2 = S2_TEXCOORD_NONE;
int i, offset = 0;