diff options
| author | Eric Anholt <[email protected]> | 2011-10-21 16:32:03 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2011-10-29 12:15:33 -0700 |
| commit | db364a8af0d19e4032ac44635834737017e1051c (patch) | |
| tree | d58e12324f87688dd5c074e723b1af07657f5685 /src/mesa/drivers/dri/i915 | |
| parent | 439d67f502cf78a977501c310e13d8d5f05e4986 (diff) | |
i915: Move the always_flush_cache code to triangle emit.
This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space. This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).
Reviewed-by: Kenneth Graunke <[email protected]>
Acked-by: Paul Berry <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i915')
| -rw-r--r-- | src/mesa/drivers/dri/i915/intel_tris.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index eb7fb60eb6d..23de6ea943b 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -234,6 +234,10 @@ void intel_flush_prim(struct intel_context *intel) */ intel->no_batch_wrap = true; + if (intel->always_flush_cache) { + intel_batchbuffer_emit_mi_flush(intel); + } + #if 0 printf("emitting %d..%d=%d vertices size %d\n", offset, intel->prim.current_offset, count, @@ -306,6 +310,10 @@ void intel_flush_prim(struct intel_context *intel) ADVANCE_BATCH(); } + if (intel->always_flush_cache) { + intel_batchbuffer_emit_mi_flush(intel); + } + intel->no_batch_wrap = false; drm_intel_bo_unreference(vb_bo); |