diff options
author | Eric Anholt <[email protected]> | 2010-06-07 09:52:57 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2010-06-08 13:42:02 -0700 |
commit | 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e (patch) | |
tree | 0d0a246b981cc60fc70d6cf6103b05d0df045c23 /src/mesa/drivers/dri/i915 | |
parent | 22409756d4ed941f2ec6729ab0c312149749106f (diff) |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_texstate.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_vtbl.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_texstate.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_vtbl.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_tris.c | 18 |
7 files changed, 21 insertions, 21 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h index d7eb9c2d44b..2100ffe6d99 100644 --- a/src/mesa/drivers/dri/i915/i830_context.h +++ b/src/mesa/drivers/dri/i915/i830_context.h @@ -131,7 +131,7 @@ struct i830_hw_state * be from a PBO or FBO. Will have to do this for draw and depth for * FBO's... */ - dri_bo *tex_buffer[I830_TEX_UNITS]; + drm_intel_bo *tex_buffer[I830_TEX_UNITS]; GLuint tex_offset[I830_TEX_UNITS]; GLuint emitted; /* I810_UPLOAD_* */ diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index a28073919cb..ace44430d97 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -129,7 +129,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) /*We need to refcount these. */ if (i830->state.tex_buffer[unit] != NULL) { - dri_bo_unreference(i830->state.tex_buffer[unit]); + drm_intel_bo_unreference(i830->state.tex_buffer[unit]); i830->state.tex_buffer[unit] = NULL; } @@ -144,7 +144,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) intel_miptree_get_image_offset(intelObj->mt, intelObj->firstLevel, 0, 0, &dst_x, &dst_y); - dri_bo_reference(intelObj->mt->region->buffer); + drm_intel_bo_reference(intelObj->mt->region->buffer); i830->state.tex_buffer[unit] = intelObj->mt->region->buffer; pitch = intelObj->mt->region->pitch * intelObj->mt->cpp; @@ -327,7 +327,7 @@ i830UpdateTextureState(struct intel_context *intel) I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(i), GL_FALSE); if (i830->state.tex_buffer[i] != NULL) { - dri_bo_unreference(i830->state.tex_buffer[i]); + drm_intel_bo_unreference(i830->state.tex_buffer[i]); i830->state.tex_buffer[i] = NULL; } break; diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index be96419ff19..0775d7fe943 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -415,7 +415,7 @@ i830_emit_state(struct intel_context *intel) struct i830_hw_state *state = &i830->state; int i, count; GLuint dirty; - dri_bo *aper_array[3 + I830_TEX_UNITS]; + drm_intel_bo *aper_array[3 + I830_TEX_UNITS]; int aper_count; GET_CURRENT_CONTEXT(ctx); BATCH_LOCALS; @@ -576,7 +576,7 @@ i830_destroy_context(struct intel_context *intel) for (i = 0; i < I830_TEX_UNITS; i++) { if (i830->state.tex_buffer[i] != NULL) { - dri_bo_unreference(i830->state.tex_buffer[i]); + drm_intel_bo_unreference(i830->state.tex_buffer[i]); i830->state.tex_buffer[i] = NULL; } } diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h index c5858492c26..33dad9a1953 100644 --- a/src/mesa/drivers/dri/i915/i915_context.h +++ b/src/mesa/drivers/dri/i915/i915_context.h @@ -237,7 +237,7 @@ struct i915_hw_state * be from a PBO or FBO. Will have to do this for draw and depth for * FBO's... */ - dri_bo *tex_buffer[I915_TEX_UNITS]; + drm_intel_bo *tex_buffer[I915_TEX_UNITS]; GLuint tex_offset[I915_TEX_UNITS]; diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index 9c56b55feeb..e0e7f3bc3da 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -146,7 +146,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) /*We need to refcount these. */ if (i915->state.tex_buffer[unit] != NULL) { - dri_bo_unreference(i915->state.tex_buffer[unit]); + drm_intel_bo_unreference(i915->state.tex_buffer[unit]); i915->state.tex_buffer[unit] = NULL; } @@ -158,7 +158,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) */ firstImage = tObj->Image[0][intelObj->firstLevel]; - dri_bo_reference(intelObj->mt->region->buffer); + drm_intel_bo_reference(intelObj->mt->region->buffer); i915->state.tex_buffer[unit] = intelObj->mt->region->buffer; i915->state.tex_offset[unit] = 0; /* Always the origin of the miptree */ @@ -397,7 +397,7 @@ i915UpdateTextureState(struct intel_context *intel) I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(i), GL_FALSE); if (i915->state.tex_buffer[i] != NULL) { - dri_bo_unreference(i915->state.tex_buffer[i]); + drm_intel_bo_unreference(i915->state.tex_buffer[i]); i915->state.tex_buffer[i] = NULL; } diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index 29939c7f09f..d7828a296ad 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -287,7 +287,7 @@ i915_emit_state(struct intel_context *intel) struct i915_hw_state *state = &i915->state; int i, count, aper_count; GLuint dirty; - dri_bo *aper_array[3 + I915_TEX_UNITS]; + drm_intel_bo *aper_array[3 + I915_TEX_UNITS]; GET_CURRENT_CONTEXT(ctx); BATCH_LOCALS; @@ -497,7 +497,7 @@ i915_destroy_context(struct intel_context *intel) for (i = 0; i < I915_TEX_UNITS; i++) { if (i915->state.tex_buffer[i] != NULL) { - dri_bo_unreference(i915->state.tex_buffer[i]); + drm_intel_bo_unreference(i915->state.tex_buffer[i]); i915->state.tex_buffer[i] = NULL; } } diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index 7aecf68e4a8..ede111b87a2 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -179,8 +179,8 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count) /* Start a new VB */ if (intel->prim.vb == NULL) intel->prim.vb = malloc(INTEL_VB_SIZE); - intel->prim.vb_bo = dri_bo_alloc(intel->bufmgr, "vb", - INTEL_VB_SIZE, 4); + intel->prim.vb_bo = drm_intel_bo_alloc(intel->bufmgr, "vb", + INTEL_VB_SIZE, 4); intel->prim.start_offset = 0; intel->prim.current_offset = 0; } @@ -197,8 +197,8 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count) /** Dispatches the accumulated primitive to the batchbuffer. */ void intel_flush_prim(struct intel_context *intel) { - dri_bo *aper_array[2]; - dri_bo *vb_bo; + drm_intel_bo *aper_array[2]; + drm_intel_bo *vb_bo; unsigned int offset, count; BATCH_LOCALS; @@ -212,7 +212,7 @@ void intel_flush_prim(struct intel_context *intel) * flush triggered by emit_state doesn't loop back to flush_prim again. */ vb_bo = intel->prim.vb_bo; - dri_bo_reference(vb_bo); + drm_intel_bo_reference(vb_bo); count = intel->prim.count; intel->prim.count = 0; offset = intel->prim.start_offset; @@ -296,7 +296,7 @@ void intel_flush_prim(struct intel_context *intel) intel->no_batch_wrap = GL_FALSE; - dri_bo_unreference(vb_bo); + drm_intel_bo_unreference(vb_bo); } /** @@ -315,9 +315,9 @@ void intel_finish_vb(struct intel_context *intel) if (intel->prim.vb_bo == NULL) return; - dri_bo_subdata(intel->prim.vb_bo, 0, intel->prim.start_offset, - intel->prim.vb); - dri_bo_unreference(intel->prim.vb_bo); + drm_intel_bo_subdata(intel->prim.vb_bo, 0, intel->prim.start_offset, + intel->prim.vb); + drm_intel_bo_unreference(intel->prim.vb_bo); intel->prim.vb_bo = NULL; } |