intel: Replace mt->pitch with mt->region->pitch.

The pitch is not really an inherent part of the miptree, since it's
not part of any of the layout calculations, and it's dictated by the
libdrm-allocated region pitch now.

3 files changed, 16 insertions, 19 deletions

diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index e8f7e378ec7..a28073919cb 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -146,15 +146,15 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 
    dri_bo_reference(intelObj->mt->region->buffer);
    i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+   pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
+
    /* XXX: This calculation is probably broken for tiled images with
     * a non-page-aligned offset.
     */
-   i830->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
-      intelObj->mt->cpp;
+   i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch;
 
    format = translate_texture_format(firstImage->TexFormat,
 				     firstImage->InternalFormat);
-   pitch = intelObj->mt->pitch * intelObj->mt->cpp;
 
    state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
                                (LOAD_TEXTURE_MAP0 << unit) | 4);
diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
index fe3908f580a..702655283ba 100644
--- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -123,13 +123,12 @@ i915_miptree_layout_cube(struct intel_context *intel,
    assert(lvlWidth == lvlHeight); /* cubemap images are square */
 
    /* double pitch for cube layouts */
-   mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+   mt->total_width = dim * 2;
    mt->total_height = dim * 4;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
       intel_miptree_set_level_info(mt, level, 6,
 				   0, 0,
-				   /*OLD: mt->pitch, mt->total_height,*/
 				   lvlWidth, lvlHeight,
 				   1);
       lvlWidth /= 2;
@@ -167,7 +166,7 @@ i915_miptree_layout_3d(struct intel_context *intel,
    GLint level;
 
    /* Calculate the size of a single slice. */
-   mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+   mt->total_width = mt->width0;
 
    /* XXX: hardware expects/requires 9 levels at minimum. */
    for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
@@ -210,7 +209,7 @@ i915_miptree_layout_2d(struct intel_context *intel,
    GLuint img_height;
    GLint level;
 
-   mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+   mt->total_width = mt->width0;
    mt->total_height = 0;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -251,9 +250,8 @@ i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
       break;
    }
 
-   DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
-       mt->pitch,
-       mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+   DBG("%s: %dx%dx%d\n", __FUNCTION__,
+       mt->total_width, mt->total_height, mt->cpp);
 
    return GL_TRUE;
 }
@@ -336,9 +334,9 @@ i945_miptree_layout_cube(struct intel_context *intel,
     * or the final row of 4x4, 2x2 and 1x1 faces below this.
     */
    if (dim > 32)
-      mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+      mt->total_width = dim * 2;
    else
-      mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, 14 * 8);
+      mt->total_width = 14 * 8;
 
    if (dim >= 4)
       mt->total_height = dim * 4 + 4;
@@ -423,11 +421,11 @@ i945_miptree_layout_3d(struct intel_context *intel,
    GLuint pack_y_pitch;
    GLuint level;
 
-   mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+   mt->total_width = mt->width0;
    mt->total_height = 0;
 
    pack_y_pitch = MAX2(mt->height0, 2);
-   pack_x_pitch = mt->pitch;
+   pack_x_pitch = mt->total_width;
    pack_x_nr = 1;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -454,7 +452,7 @@ i945_miptree_layout_3d(struct intel_context *intel,
       if (pack_x_pitch > 4) {
 	 pack_x_pitch >>= 1;
 	 pack_x_nr <<= 1;
-	 assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+	 assert(pack_x_pitch * pack_x_nr <= mt->total_width);
       }
 
       if (pack_y_pitch > 2) {
@@ -491,9 +489,8 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
       break;
    }
 
-   DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
-       mt->pitch,
-       mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+   DBG("%s: %dx%dx%d\n", __FUNCTION__,
+       mt->total_width, mt->total_height, mt->cpp);
 
    return GL_TRUE;
 }
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index a1ab8f8b6d2..ff9ab88c5ab 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -165,7 +165,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
    format = translate_texture_format(firstImage->TexFormat,
 				     firstImage->InternalFormat,
 				     tObj->DepthMode);
-   pitch = intelObj->mt->pitch * intelObj->mt->cpp;
+   pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
 
    state[I915_TEXREG_MS3] =
       (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |