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authorEric Anholt <[email protected]>2008-08-08 13:58:48 -0700
committerEric Anholt <[email protected]>2008-08-08 14:00:43 -0700
commitd2796939f18815935c8fe1effb01fa9765d6c7d8 (patch)
tree207b657f757db711640029fe2e27ee657cbc04d0 /src/mesa/drivers/dri/i915
parent527e1cf172cb0a4d1f2891a351498669be1620cd (diff)
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c17
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c29
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c10
3 files changed, 34 insertions, 22 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 0af5ed0b500..40a50ff772f 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -420,10 +420,12 @@ i830_emit_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
struct i830_hw_state *state = i830->current;
- int i, ret, count;
+ int i, count;
GLuint dirty;
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
+ dri_bo *aper_array[3 + I830_TEX_UNITS];
+ int aper_count;
/* We don't hold the lock at this point, so want to make sure that
* there won't be a buffer wrap between the state emits and the primitive
@@ -441,22 +443,23 @@ i830_emit_state(struct intel_context *intel)
LOOP_CLIPRECTS);
count = 0;
again:
+ aper_count = 0;
dirty = get_dirty(state);
- ret = 0;
+ aper_array[aper_count++] = intel->batch->buf;
if (dirty & I830_UPLOAD_BUFFERS) {
- ret |= dri_bufmgr_check_aperture_space(state->draw_region->buffer);
- ret |= dri_bufmgr_check_aperture_space(state->depth_region->buffer);
+ aper_array[aper_count++] = state->draw_region->buffer;
+ aper_array[aper_count++] = state->depth_region->buffer;
}
-
+
for (i = 0; i < I830_TEX_UNITS; i++)
if (dirty & I830_UPLOAD_TEX(i)) {
if (state->tex_buffer[i]) {
- ret |= dri_bufmgr_check_aperture_space(state->tex_buffer[i]);
+ aper_array[aper_count++] = state->tex_buffer[i];
}
}
- if (ret) {
+ if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
if (count == 0) {
count++;
intel_batchbuffer_flush(intel->batch);
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 27dfc2b8909..19f2206285d 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -297,9 +297,9 @@ i915_emit_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
struct i915_hw_state *state = i915->current;
- int i;
- int ret, count;
+ int i, count, aper_count;
GLuint dirty;
+ dri_bo *aper_array[3 + I915_TEX_UNITS];
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
@@ -319,24 +319,27 @@ i915_emit_state(struct intel_context *intel)
LOOP_CLIPRECTS);
count = 0;
again:
+ aper_count = 0;
dirty = get_dirty(state);
- ret = 0;
+ aper_array[aper_count++] = intel->batch->buf;
if (dirty & I915_UPLOAD_BUFFERS) {
- ret |= dri_bufmgr_check_aperture_space(state->draw_region->buffer);
- if (state->depth_region)
- ret |= dri_bufmgr_check_aperture_space(state->depth_region->buffer);
+ aper_array[aper_count++] = state->draw_region->buffer;
+ if (state->depth_region)
+ aper_array[aper_count++] = state->depth_region->buffer;
}
if (dirty & I915_UPLOAD_TEX_ALL) {
- for (i = 0; i < I915_TEX_UNITS; i++)
- if (dirty & I915_UPLOAD_TEX(i)) {
- if (state->tex_buffer[i]) {
- ret |= dri_bufmgr_check_aperture_space(state->tex_buffer[i]);
- }
- }
+ for (i = 0; i < I915_TEX_UNITS; i++) {
+ if (dirty & I915_UPLOAD_TEX(i)) {
+ if (state->tex_buffer[i]) {
+ aper_array[aper_count++] = state->tex_buffer[i];
+ }
+ }
+ }
}
- if (ret) {
+
+ if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
if (count == 0) {
count++;
intel_batchbuffer_flush(intel->batch);
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index 8714dd15f33..5f4b852212a 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -92,8 +92,6 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
INTEL_VB_SIZE, 4);
intel->prim.start_offset = 0;
intel->prim.current_offset = 0;
-
- dri_bufmgr_check_aperture_space(intel->prim.vb_bo);
}
intel->prim.flush = intel_flush_prim;
@@ -109,6 +107,7 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
void intel_flush_prim(struct intel_context *intel)
{
BATCH_LOCALS;
+ dri_bo *aper_array[2];
dri_bo *vb_bo;
/* Must be called after an intel_start_prim. */
@@ -127,6 +126,13 @@ void intel_flush_prim(struct intel_context *intel)
intel->vtbl.emit_state(intel);
+ aper_array[0] = intel->batch->buf;
+ aper_array[1] = vb_bo;
+ if (dri_bufmgr_check_aperture_space(aper_array, 2)) {
+ intel_batchbuffer_flush(intel->batch);
+ intel->vtbl.emit_state(intel);
+ }
+
/* Ensure that we don't start a new batch for the following emit, which
* depends on the state just emitted. emit_state should be making sure we
* have the space for this.