summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i915/intel_screen.c
diff options
context:
space:
mode:
authorRoland Scheidegger <[email protected]>2006-02-03 13:29:11 +0000
committerRoland Scheidegger <[email protected]>2006-02-03 13:29:11 +0000
commite7276b7fa597f7914f7e10a2e50dae36ae50e10b (patch)
tree56b65ced65d5e39ab8d13a76e6cc797542fb2570 /src/mesa/drivers/dri/i915/intel_screen.c
parent16a14510c4c134db9268719e9458bf6bf83e618a (diff)
replace the texture level hack used in radeon/r200 to allow larger textures with different methods to calculate the announced maximum texture sizes. Default is still the same (that is, radeon/r200 default to not announce anything which might not fit, i830/i915 default to 1 texture must fit). Bug #5785.
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_screen.c')
-rw-r--r--src/mesa/drivers/dri/i915/intel_screen.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index fde6d941abc..66dfe34ec9c 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -48,9 +48,10 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
DRI_CONF_FORCE_S3TC_ENABLE(false)
+ DRI_CONF_ALLOW_LARGE_TEXTURES(1)
DRI_CONF_SECTION_END
DRI_CONF_END;
-const GLuint __driNConfigOptions = 1;
+const GLuint __driNConfigOptions = 2;
#ifdef USE_NEW_INTERFACE
static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;