diff options
author | Roland Scheidegger <[email protected]> | 2007-12-22 18:54:01 +0100 |
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committer | Roland Scheidegger <[email protected]> | 2007-12-22 18:54:18 +0100 |
commit | 26473140b9c5e6aa962961c836f79fd5aa6cd246 (patch) | |
tree | fecba79b5b65b48aa05eaa175e781f95c859c3f6 /src/mesa/drivers/dri/i915/intel_render.c | |
parent | 2f3e939ae719f522fc26bfd62997fa8b7940c8ed (diff) |
fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)
primitive needs to include the begin/end flags (broken since vbo-0.2). Should
fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon,
s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_render.c')
-rw-r--r-- | src/mesa/drivers/dri/i915/intel_render.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c index c8b6d308d96..473ddb8393d 100644 --- a/src/mesa/drivers/dri/i915/intel_render.c +++ b/src/mesa/drivers/dri/i915/intel_render.c @@ -216,7 +216,7 @@ intel_run_render(GLcontext * ctx, struct tnl_pipeline_stage *stage) tnl->Driver.Render.Start(ctx); for (i = 0; i < VB->PrimitiveCount; i++) { - GLuint prim = VB->Primitive[i].mode; + GLuint prim = _tnl_translate_prim(&VB->Primitive[i]); GLuint start = VB->Primitive[i].start; GLuint length = VB->Primitive[i].count; |