diff options
| author | Dave Airlie <[email protected]> | 2009-06-07 16:51:32 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2009-06-07 16:51:32 +1000 |
| commit | 545e574cd9a2a659cd9a93879dff8884bd247558 (patch) | |
| tree | f56d65eaa851edfb1248a6fc8ac0bae4cc98eff5 /src/mesa/drivers/dri/i915/i915_texstate.c | |
| parent | e2aedfa62079ff1a333e1f4e56faea303cc36edb (diff) | |
| parent | f1edfa09ea50e8833ddbf241da4d36fd38685e9d (diff) | |
Merge remote branch 'origin/master' into radeon-rewrite
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_texstate.c')
| -rw-r--r-- | src/mesa/drivers/dri/i915/i915_texstate.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index a37dd7f4fb5..32d4b30cf9a 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -185,8 +185,13 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) state[I915_TEXREG_MS3] = (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) | - ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format | - MS3_USE_FENCE_REGS); + ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format); + + if (intelObj->mt->region->tiling != I915_TILING_NONE) { + state[I915_TEXREG_MS3] |= MS3_TILED_SURFACE; + if (intelObj->mt->region->tiling == I915_TILING_Y) + state[I915_TEXREG_MS3] |= MS3_TILE_WALK; + } state[I915_TEXREG_MS4] = ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK | |