diff options
| author | Ville Syrjälä <[email protected]> | 2014-07-06 15:02:15 +0300 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2014-11-13 19:13:27 +0200 |
| commit | 0d924738d9d86a19b9bffa01ba9f29f2f697bb27 (patch) | |
| tree | 120ddde7449e6b7bec887907ee2efaa07168f6de /src/mesa/drivers/dri/i915/i915_state.c | |
| parent | 81c31e560f230eddb5c081b5526c43258c12a8ac (diff) | |
i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE
According to gen2 BSpec the pipeline must be flushed at least up to the
windower before changing the scissor rect enable field. Emitting the
3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient
to do that.
gen3 BSpec no longer has that piece of text, but let's make the same
change there too for symmetry. The spec does still say that the scissor
rectangle must be defined before enabling it, so the new order does seem
more in line with the spec.
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i915/i915_state.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c index f9aecba2327..32e5f98ce67 100644 --- a/src/mesa/drivers/dri/i915/i915_state.c +++ b/src/mesa/drivers/dri/i915/i915_state.c @@ -980,11 +980,11 @@ i915_init_packets(struct i915_context *i915) i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD; /* scissor */ - i915->state.Buffer[I915_DESTREG_SENABLE] = - (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD; i915->state.Buffer[I915_DESTREG_SR1] = 0; i915->state.Buffer[I915_DESTREG_SR2] = 0; + i915->state.Buffer[I915_DESTREG_SENABLE] = + (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); } i915->state.RasterRules[I915_RASTER_RULES] = _3DSTATE_RASTER_RULES_CMD | |