diff options
author | Roland Scheidegger <[email protected]> | 2006-02-03 13:29:11 +0000 |
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committer | Roland Scheidegger <[email protected]> | 2006-02-03 13:29:11 +0000 |
commit | e7276b7fa597f7914f7e10a2e50dae36ae50e10b (patch) | |
tree | 56b65ced65d5e39ab8d13a76e6cc797542fb2570 /src/mesa/drivers/dri/i915/i915_context.c | |
parent | 16a14510c4c134db9268719e9458bf6bf83e618a (diff) |
replace the texture level hack used in radeon/r200 to allow larger textures with different methods to calculate the announced maximum texture sizes. Default is still the same (that is, radeon/r200 default to not announce anything which might not fit, i830/i915 default to 1 texture must fit). Bug #5785.
Diffstat (limited to 'src/mesa/drivers/dri/i915/i915_context.c')
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_context.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index cd0eaf2470f..b5c3f58d458 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -102,6 +102,7 @@ GLboolean i915CreateContext( const __GLcontextModes *mesaVis, i915ContextPtr i915 = (i915ContextPtr) CALLOC_STRUCT(i915_context); intelContextPtr intel = &i915->intel; GLcontext *ctx = &intel->ctx; + GLuint i; if (!i915) return GL_FALSE; @@ -135,7 +136,8 @@ GLboolean i915CreateContext( const __GLcontextModes *mesaVis, * tightly packed, but they're not in Intel graphics * hardware. */ - ctx->Const.MaxTextureUnits = 1; + ctx->Const.MaxTextureUnits = I915_TEX_UNITS; + i = driQueryOptioni( &intel->intelScreen->optionCache, "allow_large_textures"); driCalculateMaxTextureLevels( intel->texture_heaps, intel->nr_heaps, &intel->ctx.Const, @@ -145,8 +147,8 @@ GLboolean i915CreateContext( const __GLcontextModes *mesaVis, 11, /* cube texture. */ 11, /* rect texture */ 12, - GL_FALSE ); - ctx->Const.MaxTextureUnits = I915_TEX_UNITS; + GL_FALSE, + i ); /* GL_ARB_fragment_program limits - don't think Mesa actually * validates programs against these, and in any case one ARB |