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authorSamuel Pitoiset <[email protected]>2015-10-09 11:22:20 +0200
committerSamuel Pitoiset <[email protected]>2015-10-16 21:57:44 +0200
commitc4896c99cbe10b829981250465baf0b00e18ba40 (patch)
tree7d434918a651d126688dc266d928a095632466ce /src/mapi/entry_x86-64_tls.h
parent7abd707251f29aaf27f83644e47d2dc8b75e10c6 (diff)
nvc0: fix unaligned mem access when reading MP counters on Fermi
Memory access have to be aligned to 128-bits. Note that this doesn't happen when the card only has TPC. This patch fixes the following dmesg fail: gr: GPC0/TPC1/MP trap: global 00000004 [MULTIPLE_WARP_ERRORS] warp 000f [UNALIGNED_MEM_ACCESS] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/mapi/entry_x86-64_tls.h')
0 files changed, 0 insertions, 0 deletions