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authorKenneth Graunke <[email protected]>2017-11-23 23:15:14 -0800
committerKenneth Graunke <[email protected]>2019-02-21 10:26:04 -0800
commit2dce0e94a3debe8d514a67dccad2505524c7d642 (patch)
tree61d8eb8b416e0cff20ebaf96fa7d17a34de000fb /src/loader
parenteac822eac1d0d682aa199cb039e9df4c53ec5e1e (diff)
iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.
This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
Diffstat (limited to 'src/loader')
-rw-r--r--src/loader/pci_id_driver_map.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/loader/pci_id_driver_map.h b/src/loader/pci_id_driver_map.h
index c582aae709b..99fe4ad2161 100644
--- a/src/loader/pci_id_driver_map.h
+++ b/src/loader/pci_id_driver_map.h
@@ -23,6 +23,14 @@ static const int i965_chip_ids[] = {
#undef CHIPSET
};
+static const int iris_chip_ids[] = {
+#define CHIPSET(chip, family, name) chip,
+#define IRIS 1
+#include "pci_ids/i965_pci_ids.h"
+#undef IRIS
+#undef CHIPSET
+};
+
static const int r100_chip_ids[] = {
#define CHIPSET(chip, name, family) chip,
#include "pci_ids/radeon_pci_ids.h"
@@ -76,6 +84,7 @@ static const struct {
} driver_map[] = {
{ 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
{ 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
+ { 0x8086, "iris", iris_chip_ids, ARRAY_SIZE(iris_chip_ids) },
{ 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
{ 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
{ 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },