diff options
| author | Jose Maria Casanova Crespo <[email protected]> | 2018-04-10 10:02:29 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <[email protected]> | 2018-05-03 11:40:25 +0200 |
| commit | e5fc3c07170cff756b7bc7cbeee67212fc46c9a5 (patch) | |
| tree | c6ecea15ec88134ac3b619857a459036bf47950d /src/intel | |
| parent | 939501c8edc963c429f19eb43f798f6db343a65f (diff) | |
intel/compiler: implement nir_instr_type_load_const for 16-bit constants
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 3b277959e95..5f8f7cd6a66 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1511,6 +1511,11 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld, fs_reg reg = bld.vgrf(reg_type, instr->def.num_components); switch (instr->def.bit_size) { + case 16: + for (unsigned i = 0; i < instr->def.num_components; i++) + bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value.i16[i])); + break; + case 32: for (unsigned i = 0; i < instr->def.num_components; i++) bld.MOV(offset(reg, bld, i), brw_imm_d(instr->value.i32[i])); |