intel/isl: Limit CCS to one level and layer on gen7

v2 (Jason Ekstrand):
- Remove Vulkan-specific terminology from the commit title.
- Replace '== 7' with '<= 7' to hint that this is a new feature on BDW+.

Signed-off-by: Nanley Chery <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]> (v1)
Reviewed-by: Jason Ekstrand <[email protected]>

1 files changed, 7 insertions, 2 deletions

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 2449ffb29ae..ba56d86c178 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1736,14 +1736,19 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
       return false;
    }
 
+   /* Multi-LOD and multi-layer CCS isn't supported on gen7. */
+   const uint8_t levels = ISL_DEV_GEN(dev) <= 7 ? 1 : surf->levels;
+   const uint32_t array_len = ISL_DEV_GEN(dev) <= 7 ?
+                              1 : surf->logical_level0_px.array_len;
+
    return isl_surf_init(dev, ccs_surf,
                         .dim = surf->dim,
                         .format = ccs_format,
                         .width = surf->logical_level0_px.width,
                         .height = surf->logical_level0_px.height,
                         .depth = surf->logical_level0_px.depth,
-                        .levels = surf->levels,
-                        .array_len = surf->logical_level0_px.array_len,
+                        .levels = levels,
+                        .array_len = array_len,
                         .samples = 1,
                         .usage = ISL_SURF_USAGE_CCS_BIT,
                         .tiling_flags = ISL_TILING_CCS_BIT);