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authorTopi Pohjolainen <[email protected]>2018-05-30 07:46:08 -0400
committerAnuj Phogat <[email protected]>2018-07-27 11:05:04 -0700
commita5889d70f2074201ceaeac4f96a9a0c0b1f68a31 (patch)
treeee4fe6173ec581dd219731c8d84bdd393cc0aef3 /src/intel
parent1d71981b274ecfb9764b360772be7e9bcc868484 (diff)
i965/icl: Disable binding table prefetching
Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to disable prefetching of binding tables for ICLLP A0 and B0 steppings. It fixes multiple gpu hangs in ext_framebuffer_multisample* tests on ICLLP B0 h/w. Anuj: Add comments and commit message. Add gen 11 checks in the code. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/blorp/blorp_genX_exec.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 8bd9174b677..50341ab0ecf 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -762,6 +762,13 @@ blorp_emit_ps_config(struct blorp_batch *batch,
ps.BindingTableEntryCount = 1;
}
+ /* Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to
+ * disable prefetching of binding tables on A0 and B0 steppings.
+ * TODO: Revisit this WA on C0 stepping.
+ */
+ if (GEN_GEN == 11)
+ ps.BindingTableEntryCount = 0;
+
if (prog_data) {
ps._8PixelDispatchEnable = prog_data->dispatch_8;
ps._16PixelDispatchEnable = prog_data->dispatch_16;