diff options
author | Jason Ekstrand <[email protected]> | 2016-10-10 09:30:29 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2016-10-14 15:39:41 -0700 |
commit | 82a2c49c5f3c8784e5239ebed7ad0bf8a44c687b (patch) | |
tree | fa58ff868e2ce5d4424ee0e64047dcab925c1421 /src/intel | |
parent | b324c38ae3e47940e5ffe441f169f839a3d53261 (diff) |
intel/blorp: Emit a NULL render target for depth/stencil-only operations
This never mattered before because the only time we used blorp
depth/stencil only was to do HiZ operations on gen6-7. It may have worked
in that case (and maybe it didn't) but slow depth clears actually do depth
rendering so they need a valid render target.
Signed-off-by: Jason Ekstrand <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/blorp/blorp_genX_exec.h | 49 |
1 files changed, 44 insertions, 5 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index bab6da1483b..fa5cebf8242 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1053,6 +1053,36 @@ blorp_emit_surface_state(struct blorp_batch *batch, } static void +blorp_emit_null_surface_state(struct blorp_batch *batch, + const struct brw_blorp_surface_info *surface, + uint32_t *state) +{ + struct GENX(RENDER_SURFACE_STATE) ss = { + .SurfaceType = SURFTYPE_NULL, + .SurfaceFormat = ISL_FORMAT_R8G8B8A8_UNORM, + .Width = surface->surf.logical_level0_px.width - 1, + .Height = surface->surf.logical_level0_px.height - 1, + .MIPCountLOD = surface->view.base_level, + .MinimumArrayElement = surface->view.base_array_layer, + .Depth = surface->view.array_len - 1, + .RenderTargetViewExtent = surface->view.array_len - 1, + .NumberofMultisamples = ffs(surface->surf.samples) - 1, + +#if GEN_GEN >= 7 + .SurfaceArray = surface->surf.dim != ISL_SURF_DIM_3D, +#endif + +#if GEN_GEN >= 8 + .TileMode = YMAJOR, +#else + .TiledSurface = true, +#endif + }; + + GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &ss); +} + +static void blorp_emit_surface_states(struct blorp_batch *batch, const struct blorp_params *params) { @@ -1066,9 +1096,19 @@ blorp_emit_surface_states(struct blorp_batch *batch, blorp_alloc_binding_table(batch, num_surfaces, ss_size, ss_align, &bind_offset, surface_offsets, surface_maps); - blorp_emit_surface_state(batch, ¶ms->dst, - surface_maps[BLORP_RENDERBUFFER_BT_INDEX], - surface_offsets[BLORP_RENDERBUFFER_BT_INDEX], true); + if (params->dst.enabled) { + blorp_emit_surface_state(batch, ¶ms->dst, + surface_maps[BLORP_RENDERBUFFER_BT_INDEX], + surface_offsets[BLORP_RENDERBUFFER_BT_INDEX], + true); + } else { + assert(params->depth.enabled || params->stencil.enabled); + const struct brw_blorp_surface_info *surface = + params->depth.enabled ? ¶ms->depth : ¶ms->stencil; + blorp_emit_null_surface_state(batch, surface, + surface_maps[BLORP_RENDERBUFFER_BT_INDEX]); + } + if (params->src.enabled) { blorp_emit_surface_state(batch, ¶ms->src, surface_maps[BLORP_TEXTURE_BT_INDEX], @@ -1264,8 +1304,7 @@ blorp_exec(struct blorp_batch *batch, const struct blorp_params *params) blorp_emit(batch, GENX(3DSTATE_CONSTANT_GS), gs); blorp_emit(batch, GENX(3DSTATE_CONSTANT_PS), ps); - if (params->wm_prog_data) - blorp_emit_surface_states(batch, params); + blorp_emit_surface_states(batch, params); if (params->src.enabled) blorp_emit_sampler_state(batch, params); |