diff options
| author | Jose Maria Casanova Crespo <[email protected]> | 2018-05-03 02:18:37 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <[email protected]> | 2018-05-03 11:40:25 +0200 |
| commit | f575277f7e4cd3568ae2b0d8d2b0c6e0cf611d62 (patch) | |
| tree | 6abb054011e50689ad7d2adfbe988cfd6e0bc998 /src/intel | |
| parent | f0e6dacee529661393964725bed561c45405bae4 (diff) | |
intel/compiler: support negate and abs of half float immediates
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 284c2e8233c..537defd05d9 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -605,7 +605,8 @@ brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg) case BRW_REGISTER_TYPE_V: assert(!"unimplemented: negate UV/V immediate"); case BRW_REGISTER_TYPE_HF: - assert(!"unimplemented: negate HF immediate"); + reg->ud ^= 0x80008000; + return true; case BRW_REGISTER_TYPE_NF: unreachable("no NF immediates"); } @@ -651,7 +652,8 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg) case BRW_REGISTER_TYPE_V: assert(!"unimplemented: abs V immediate"); case BRW_REGISTER_TYPE_HF: - assert(!"unimplemented: abs HF immediate"); + reg->ud &= ~0x80008000; + return true; case BRW_REGISTER_TYPE_NF: unreachable("no NF immediates"); } |