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author | Caio Marcelo de Oliveira Filho <[email protected]> | 2019-03-08 10:08:20 -0800 |
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committer | Caio Marcelo de Oliveira Filho <[email protected]> | 2019-03-13 08:39:16 -0700 |
commit | 822a8865e4645ed7e1818568d1d0338b462c7748 (patch) | |
tree | f1514d38c31317dc80f0c53dd80ae40de52cb066 /src/intel | |
parent | cbf022cb316f1224f9afcc12ca414fc2d7d778a8 (diff) |
nir: Add a pass to combine store_derefs to same vector
v2: (all from Jason)
Reuse existing function for the end of the block combinations.
Check the SSA values are coming from the right place in tests.
Document the case when the store to array_deref is reused.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/compiler/brw_nir.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index ba90a8392dc..23005b00374 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -555,6 +555,7 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler, } OPT(nir_opt_copy_prop_vars); OPT(nir_opt_dead_write_vars); + OPT(nir_opt_combine_stores, nir_var_all); if (is_scalar) { OPT(nir_lower_alu_to_scalar); |