diff options
| author | Arcady Goldmints-Orlov <[email protected]> | 2019-09-12 14:20:22 -0500 |
|---|---|---|
| committer | Arcady Goldmints-Orlov <[email protected]> | 2019-09-19 09:10:40 -0500 |
| commit | 5ec5fecc26d1818157298c8507ba208f9f3501a1 (patch) | |
| tree | 80106eb0818d7adf70ea79b0ca3930549823e45c /src/intel | |
| parent | 8b78cce433b09fe78cde05d740075fb8832e44dc (diff) | |
anv: fix descriptor limits on gen8
Later generations support bindless for samplers, images, and buffers and
thus per-stage descriptors are not limited by the binding table size.
However, gen8 doesn't support bindless images and thus needs to report a
lower per-stage limit so that all combinations of descriptors that fit
within the advertised limits are reported as supported by
vkGetDescriptorSetLayoutSupport.
Fixes test dEQP-VK.api.maintenance3_check.descriptor_set
Fixes: 79fb0d27f3 ("anv: Implement SSBOs bindings with GPU addresses in the descriptor BO")
Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/anv_descriptor_set.c | 2 | ||||
| -rw-r--r-- | src/intel/vulkan/anv_device.c | 8 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c index 8491436f14a..23d6ddede5b 100644 --- a/src/intel/vulkan/anv_descriptor_set.c +++ b/src/intel/vulkan/anv_descriptor_set.c @@ -306,7 +306,7 @@ void anv_GetDescriptorSetLayoutSupport( /* Our maximum binding table size is 240 and we need to reserve 8 for * render targets. */ - if (surface_count[s] >= MAX_BINDING_TABLE_SIZE - MAX_RTS) + if (surface_count[s] > MAX_BINDING_TABLE_SIZE - MAX_RTS) supported = false; } diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 3d0198958f3..bb1834e1867 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -1277,10 +1277,12 @@ void anv_GetPhysicalDeviceProperties( const uint32_t max_images = pdevice->has_bindless_images ? UINT16_MAX : MAX_IMAGES; - /* The moment we have anything bindless, claim a high per-stage limit */ + /* If we can use bindless for everything, claim a high per-stage limit, + * otherwise use the binding table size, minus the slots reserved for + * render targets and one slot for the descriptor buffer. */ const uint32_t max_per_stage = - pdevice->has_a64_buffer_access ? UINT32_MAX : - MAX_BINDING_TABLE_SIZE - MAX_RTS; + pdevice->has_bindless_images && pdevice->has_a64_buffer_access + ? UINT32_MAX : MAX_BINDING_TABLE_SIZE - MAX_RTS - 1; const uint32_t max_workgroup_size = 32 * devinfo->max_cs_threads; |