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authorJason Ekstrand <[email protected]>2019-06-19 14:14:20 -0500
committerJason Ekstrand <[email protected]>2019-06-19 22:21:46 +0000
commit215f9f83f53c5a374c32424378c640ce8181e542 (patch)
treee0f3ed83ee37436b654777c3ebd95be9dded3163 /src/intel
parent81e51b412e9fc72000868ebe5bbe2417b1f0486d (diff)
anv: Flush caches in anv_image_copy_to_shadow
Copies to a shadow image happen during a VkCmdPipelineBarrier or at subpass transitions. We could potentially be a bit more conservative but these transitions shouldn't happen often and it's better to have our bases covered. Fixes: f3ea0cf828 "anv: Add stencil texturing support for gen7"
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/vulkan/anv_blorp.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 1539ae1d298..e4b1448c6cd 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1409,6 +1409,15 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer,
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
+ /* We don't know who touched the main surface last so flush a bunch of
+ * caches to ensure we get good data.
+ */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_DEPTH_CACHE_FLUSH_BIT |
+ ANV_PIPE_DATA_CACHE_FLUSH_BIT |
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
+ ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT;
+
struct blorp_surf surf;
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, aspect,
@@ -1441,6 +1450,10 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer,
}
}
+ /* We just wrote to the buffer with the render cache. Flush it. */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT;
+
blorp_batch_finish(&batch);
}