diff options
| author | Iago Toral Quiroga <[email protected]> | 2018-04-26 10:12:12 +0200 |
|---|---|---|
| committer | Juan A. Suarez Romero <[email protected]> | 2019-04-18 11:05:18 +0200 |
| commit | 114f4e6c29315286d362f339138c2c33d28b7878 (patch) | |
| tree | f279d5d0f43684e52705e936875c1dfd5609759e /src/intel | |
| parent | b6a454791b45b60b9518b4b8fb41fd443b3ceab1 (diff) | |
intel/compiler: lower some 16-bit float operations to 32-bit
The hardware doesn't support half-float for these.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_nir.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index e694165d78e..c45e7d5787b 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -637,6 +637,11 @@ lower_bit_size_callback(const nir_alu_instr *alu, UNUSED void *data) case nir_op_irem: case nir_op_udiv: case nir_op_umod: + case nir_op_fceil: + case nir_op_ffloor: + case nir_op_ffract: + case nir_op_fround_even: + case nir_op_ftrunc: return 32; default: return 0; |