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authorLionel Landwerlin <[email protected]>2018-08-14 11:22:12 +0100
committerLionel Landwerlin <[email protected]>2018-08-24 23:10:08 +0100
commitf430a37fa75f534c3a114b0ec546fa14f05f5da1 (patch)
tree0467ded580a9c3181567e992e9701d495b55409f /src/intel
parent7f745c19c198cf175b6c932d236e08931f302b72 (diff)
intel: decoder: unify MI_BB_START field naming
The batch decoder looks for a field with a particular name to decide whether an MI_BB_START leads into a second batch buffer level. Because the names are different between Gen7.5/8 and the newer generation we fail that test and keep on reading (invalid) instructions. Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107544 Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/genxml/gen75.xml6
-rw-r--r--src/intel/genxml/gen8.xml6
-rw-r--r--src/intel/vulkan/anv_batch_chain.c2
3 files changed, 7 insertions, 7 deletions
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 5b01fd45400..dfc3d891498 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -2314,9 +2314,9 @@
<instruction name="MI_BATCH_BUFFER_START" bias="2" length="2">
<field name="Command Type" start="29" end="31" type="uint" default="0"/>
<field name="MI Command Opcode" start="23" end="28" type="uint" default="49"/>
- <field name="2nd Level Batch Buffer" start="22" end="22" type="uint">
- <value name="1st level batch" value="0"/>
- <value name="2nd level batch" value="1"/>
+ <field name="Second Level Batch Buffer" start="22" end="22" type="uint">
+ <value name="First level batch" value="0"/>
+ <value name="Second level batch" value="1"/>
</field>
<field name="Add Offset Enable" start="16" end="16" type="bool"/>
<field name="Predication Enable" start="15" end="15" type="bool"/>
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 4ed41d15612..330366b7ed0 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2553,9 +2553,9 @@
<instruction name="MI_BATCH_BUFFER_START" bias="2" length="3">
<field name="Command Type" start="29" end="31" type="uint" default="0"/>
<field name="MI Command Opcode" start="23" end="28" type="uint" default="49"/>
- <field name="2nd Level Batch Buffer" start="22" end="22" type="uint">
- <value name="1st level batch" value="0"/>
- <value name="2nd level batch" value="1"/>
+ <field name="Second Level Batch Buffer" start="22" end="22" type="uint">
+ <value name="First level batch" value="0"/>
+ <value name="Second level batch" value="1"/>
</field>
<field name="Add Offset Enable" start="16" end="16" type="bool"/>
<field name="Predication Enable" start="15" end="15" type="bool"/>
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index c47a81c8a4d..0f7c8325ea4 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -531,7 +531,7 @@ emit_batch_buffer_start(struct anv_cmd_buffer *cmd_buffer,
anv_batch_emit(&cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_START, bbs) {
bbs.DWordLength = cmd_buffer->device->info.gen < 8 ?
gen7_length : gen8_length;
- bbs._2ndLevelBatchBuffer = _1stlevelbatch;
+ bbs.SecondLevelBatchBuffer = Firstlevelbatch;
bbs.AddressSpaceIndicator = ASI_PPGTT;
bbs.BatchBufferStartAddress = (struct anv_address) { bo, offset };
}